基于FPGA的高速数据传输接口设计与实现

发布时间：2018-06-12 00:45

本文选题：FPGA + PCI　；参考：《北方工业大学》2014年硕士论文

【摘要】：射电望远镜在探测天体射电波的过程中会产生大量的数据,如何将采集到的海量数据高速传输给计算机进行分析和处理是一项巨大的挑战。本论文在研究和分析现有的高速数据传输接口技术的前提下,将PCI Express，，总线技术作为研究对象,根据任务需求基于FPGA设计了一款采用PCI Express总线接口的高速数据传输系统,并在计算机上开发了硬件设备的驱动程序和性能测试软件。论文首先介绍了现今的几种高速数据传输接口技术,并针对系统设计要求给出了基于PCI Express,总线技术的高速数据传输系统的设计方案。其次,深入研究了PCI Express总线协议,分别对PCI Express,总线的系统结构、配置空间、分层结构和总线事务进行剖析,为接下来的设计提供了理论基础。在FPGA中实现了PCI Express接口逻辑,通过PIO模式能够对内部寄存器进行读写操作,并且验证了PCI Express存储器读、写以及完成等事务的逻辑。数据传输使用DMA方式,详细介绍了DMA引擎模块的设计方法,对DMA写和读操作的操作流程进行了透彻的分析和说明。最后,在计算机上针对PCI Express,总线接口开发设备的驱动程序,并且基于驱动程序设计性能测试软件,实现了设备的状态检测、寄存器配置、DMA数据传输等基本功能。本设计采用PCI Express1.1标准的x8链路模式,经过实际测试,DMA数据传输速度能达到约1400MB/s,满足了系统的数据传输要求。
[Abstract]:Radio telescopes generate a large amount of data in the process of detecting radio waves from celestial bodies. It is a great challenge how to transmit the collected massive data to the computer at high speed for analysis and processing. In this paper, based on the research and analysis of the existing high-speed data transmission interface technology, the PCI Express, bus technology is taken as the research object, according to the task requirements based on FPGA, a high-speed data transmission system using PCI Express bus interface is designed. The hardware driver and performance testing software are developed on the computer. Firstly, several high speed data transmission interface technologies are introduced in this paper. The design scheme of high speed data transmission system based on PCI Express and bus technology is given. Secondly, the PCI Express bus protocol is deeply studied. The system structure, configuration space, layering structure and bus transaction of PCI Express and bus are analyzed respectively, which provides a theoretical basis for the next design. The PCI Express interface logic is implemented in FPGA, the internal register can be read and write by PIO mode, and the logic of reading, writing and completing transactions in PCI Express memory is verified. The design method of DMA engine module is introduced in detail, and the operation flow of DMA write and read operation is thoroughly analyzed and explained. Finally, the driver of the device is developed for PCI Express, bus interface on the computer, and the performance testing software is designed based on the driver to realize the state detection of the device. This design adopts the x8 link mode of PCI Express 1.1 standard. The speed of DMA data transmission can reach about 1400MB / s after the actual test, which meets the data transmission requirements of the system.
【学位授予单位】：北方工业大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TH751

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