应用于RS译码器的新型高效Berlekamp-Massey算法

发布时间：2018-01-09 01:10

本文关键词：应用于RS译码器的新型高效Berlekamp-Massey算法　出处：《天津大学》2014年硕士论文　论文类型：学位论文

【摘要】：本文为基于校验子的RS译码器提出了一个新型高效的CS-RiBM算法及其关键方程求解架构。文中通过对经典的RiBM算法进行深入分析,详细讲解了RiBM算法更新多项式的方式及其中的不足,并以此为依据成功地证明了所提出的CS-RiBM算法的正确性和高效性。与RiBM算法相比,CS-RiBM算法通过加入了一种新的多项式更新方式,就能把RiBM算法中不必要的零输入零输出运算集中起来并去除掉,同时只需要加入简单的修正就能获得与RiBM算法同样的输出结果,因而能大大提高算法的执行效率。由于CS-RiBM算法去除了大量的冗余运算,基于CS-RiBM算法的关键方程求解架构能节省很多不必要的处理单元,从而大大降低其电路的硬件复杂度。同时,该关键方程求解架构能通过合理的设计,达成规则的同构脉冲阵列结构以利于VLSI电路实现。为了与其他关键方程求解架构进行比较,使用CS-RiBM算法架构的RS(255,239)译码器和RS(255,223)译码器通过Verilog硬件描述语言进行了建模,并使用Design Compiler基于TSMC的90纳米CMOS工艺库进行了逻辑综合。综合结果显示,与过去提出的基于BM算法或ME算法的关键方程求解架构相比,本文提出的CS-RiBM算法架构能减小15%到44%的电路面积。与使用RiBM算法架构的RS译码器相比,使用CS-RiBM算法架构的译码器能有效降低其电路复杂度并提高11%到16%的面积利用率。此外,随着RS码纠错能力的提高,使用CS-RiBM算法架构的RS译码器能进一步节省电路面积,提高所能达到的面积利用效率。
[Abstract]:The RS decoder sub parity is proposed based on a novel CS-RiBM algorithm and its key equation solving framework. Based on the classic RiBM algorithm in-depth analysis, explain in detail the RiBM algorithm to update the polynomial method and the shortage, and on the correctness and efficiency of the CS-RiBM algorithm on the basis of successfully demonstrated the proposed. Compared with the RiBM algorithm, the CS-RiBM algorithm by adding a new polynomial update methods, RiBM algorithm can make zero input unnecessary zero output operation together and removed, and only need to add a simple modification to the RiBM algorithm with the same output, which can greatly improve the algorithm the efficiency of the CS-RiBM algorithm. The removal of redundant computation of architecture, key equation solving CS-RiBM algorithm can save a lot of unnecessary processing unit based on the And greatly reduce the hardware complexity. At the same time, the key equation solving framework through reasonable design, the rules agreed to isomorphism pulse structure VLSI circuit. In order to compare with other key equation solving framework, using the CS-RiBM algorithm architecture of RS decoder (255239) and RS (255223) decoder by Verilog hardware description language for modeling, and 90 nm CMOS Technology Library Based on TSMC logic synthesis using Design Compiler. The results showed that with the past proposed architecture key equation solving BM algorithm or ME algorithm based on the compared circuit area architecture proposed CS-RiBM algorithm can reduce 15% to 44% compared with the RS decoder. Using the RiBM algorithm framework, using the CS-RiBM algorithm architecture of the decoder can effectively reduce the circuit complexity and improve the utilization rate of 11% to 16% of the area. In addition, with RS The improvement of code error correction ability, the RS decoder using the CS-RiBM algorithm architecture can further save the area of the circuit and improve the area utilization efficiency that can be achieved.

【学位授予单位】：天津大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN911.22

【相似文献】