数字阵列雷达DBF处理器的设计与系统测试

发布时间：2018-02-27 13:33

本文关键词： 数字阵列雷达数字波束形成 DBF处理器 FPGA 系统联调　出处：《南京理工大学》2014年硕士论文　论文类型：学位论文

【摘要】：随着射频集成电路、大规模集成电路和数字信号处理技术的不断发展,采用数字波束形成技术的数字阵列雷达已经开始得到应用。但是,数字阵列雷达的研制仍然面临着诸多难题需要解决,如多通道海量基带数据汇拢、高性能自适应波束形成算法实时实现和同时多波束形成的实现等,需要新的实现架构和高性能的DBF处理平台。本文以某数字阵列雷达系统为背景,首先,设计了应用于该系统的基于光纤接口、采用高性能FPGA+PowerPC架构的DBF处理器,可以在单板上实现20Gbps基带数据的实时传输、同时数字多波束形成和自适应权重系数计算；接着,根据数字阵列雷达系统的实际功能要求,完成了DBF处理器两片FPGA的软件设计和功能、性能的测试验证,包括波束方向图测试和波束扫描功能测试；最后,完成了DBF处理器和数字T/R组合、频综与校准组合和雷达信号处理器的系统集成,完成了整个数字阵列雷达系统数字波束形成功能的测试验证。
[Abstract]:With the development of RF integrated circuit, large scale integrated circuit and digital signal processing technology, digital array radar using digital beamforming technology has been applied. The development of digital array radar still faces many problems, such as multi-channel mass baseband data convergence, real-time implementation of high-performance adaptive beamforming algorithm and simultaneous multi-beam forming. New implementation architecture and high performance DBF processing platform are needed. In this paper, a digital array radar system is used as a background. Firstly, a DBF processor based on optical fiber interface and high performance FPGA PowerPC architecture is designed to transmit 20Gbps baseband data on a single board. At the same time, digital multi-beam forming and adaptive weight coefficient are calculated. Then, according to the actual functional requirements of the digital array radar system, the software design and function of two pieces of FPGA of DBF processor are completed, and the performance of the FPGA is tested and verified. It includes beam pattern testing and beam scanning function testing. Finally, the system integration of DBF processor and digital T / R, frequency synthesizer and calibration combination and radar signal processor is completed. The digital beamforming function of the whole digital array radar system is tested and verified.
【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN957.51

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