OFDM系统中ADC误差校准与信道均衡联合算法的研究与实现

发布时间：2018-03-17 06:24

本文选题：分时模数转换器　切入点：失配误差　出处：《电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：数字信号处理技术是现代通信系统中不可或缺的关键,其中模拟数字转化器(ADC)搭起了模拟世界到数字世界的桥梁。在现代的数字通信系统中,传输速率达Gbps,需要同时具有高精度、高采样频率特性的ADC完成采样。由于单片ADC受工艺限制难以满足要求,多通道的分时ADC结构就成为了替代的主流选择之一。各通道间的不匹配会带来较严重的失配误差,从而对通信系统的整体性能造成不良影响。本文针对OFDM系统,深入探讨了分时ADC的几种主要的失配误差对系统性能的影响情况,并结合信道均衡方案对ADC失配误差进行了联合校准。论文主要包括以下内容:首先,针对分时ADC的时钟、增益失配误差对OFDM接收机造成的影响进行了系统建模,分析了子ADC数目对接收机性能的影响以及系统对ADC采样精度的要求,并在此基础上给出了失配误差校准及信道均衡的联合算法。通过合理地设计子ADC的数目,可以极大地简化联合算法的难度,从而使其具有可实现性。其次,复数矩阵求逆是联合均衡算法硬件实现中的关键技术,本文从算法和实现两个方面,研究了几种常用的矩阵求逆算法(基于QR分解、Cholesky分解及基于伴随矩阵求逆等),并对各算法的有效性、实现复杂度等多个方面进行了对比评估。最后,在RTL级上对联合算法进行了电路设计与实现,并在Xilinx Virtex-6上进行了实际测试,仿真与测试结果显示,在10%失配误差的情况下,经过联合算法均衡后的OFDM系统BER从-210降到-410左右,电路的最高时钟频率可达251.2MHz。
[Abstract]:Digital signal processing technology is an indispensable key in modern communication system, in which the analog digital converter ADCbuilds the bridge between analog world and digital world. The transmission rate is up to GBPs, which requires the ADC with high precision and high sampling frequency to complete the sampling. Because the single chip ADC is limited by the process, it is difficult to meet the requirement. Multi-channel time-sharing ADC structure has become one of the mainstream alternatives. The mismatch between the channels will bring serious mismatch error, which will have a negative impact on the overall performance of the communication system. In this paper, the influence of several main mismatch errors of time-sharing ADC on the system performance is discussed, and the ADC mismatch error is calibrated by combining the channel equalization scheme. The main contents of this paper are as follows: first, aiming at the clock of time-sharing ADC, The effect of gain mismatch error on OFDM receiver is modeled. The influence of the number of sub-#en1# on receiver performance and the requirement of ADC sampling accuracy are analyzed. On this basis, the joint algorithm of mismatch error calibration and channel equalization is given. By reasonably designing the number of sub-#en0#, the difficulty of the joint algorithm can be greatly simplified and the algorithm is realizable. Inverse of complex matrix is the key technology in hardware implementation of joint equalization algorithm. In this paper, several common matrix inversion algorithms (Cholesky decomposition based on QR factorization and inverse algorithm based on adjoint matrix) are studied, and their effectiveness and implementation complexity are compared and evaluated. The circuit design and implementation of the joint algorithm are carried out on the RTL level, and the actual test is carried out on the Xilinx Virtex-6. The simulation and test results show that the BER of the OFDM system after the equalization of the joint algorithm is reduced from -210 to -410 under the condition of 10% mismatch error. The highest clock frequency of the circuit can reach 251.2 MHz.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN929.53

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