基于FPGA的微型SAR实时成像处理研究

发布时间：2018-03-19 09:04

本文选题：SAR　切入点：FPGA　出处：《西安电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：合成孔径雷达(SAR)成像技术是雷达技术中一个十分重要的应用。而以无人机作为运动载体,高分辨微型SAR实时成像技术也日益成为研究热点。与传统的机载雷达相比,无人机上微型SAR实时成像系统对雷达的体积、重量、功耗都有苛刻的要求。本文主要论述了一种基于单片FPGA的雷达实时成像系统。本文首先介绍了合成孔径雷达实时成像处理技术的发展状况和应用,对基于FPGA的成像系统做了总体介绍。随后,本文对合成孔径雷达的成像原理进行分析以及对主处理芯片进行选型。文中确定了成像算法,采用距离多普勒算法。系统设计中处理芯片选择了Z7系列芯片。Zynq-7000系列产品是首款在一块芯片上同时集成了双核ARM和FPGA的芯片。ARM处理器的主要优势在于能够高效地控制系统流程。同时对于复杂的高精度算法(如运动参数估计、多普勒中心估计)也可以由ARM处理器进行处理。而芯片中集成的FPGA可以完成成像的主要算法流程,来实现实时成像处理。数据预处理是实现实时成像的重要环节。数字下变频将中频直接采集的数字信号转变为基带信号。经数字下变频处理后的数据进行滤波抽取,滤波抽取在保证距离向信号不失真的同时减少了数据量,节省资源。方位向预滤波在保证方位向信号不失真的同时减少数据量,增加处理时间间隔。方位向预滤波前的数据10KHz,而方位预滤波后,数据的重频为500Hz。距离脉压完成了距离向的一维脉冲压缩处理。成像算法处理是在数据预处理之后进行的,主要包括一次补偿、距离徙动校正和方位压缩。一次补偿、距离徙动校正操作使成像更加清晰,分辨率更高。经方位脉压后,最终实现系统成像处理。为了节省资源,更高效地进行成像处理,本文提出了模块复用的思想。根据一次补偿、距离徙动校正、方位脉压的结构特点,将三个模块用一个模块复用处理,实现资源高利用率。最后对系统进行测试,一幅SAR图像方位向数据位8192,而数据重频为500Hz,则要求在16s内必须完成一幅图的处理,在本系统中,10s就可以完成图像处理,所以达到了实时成像的要求,完成了任务指标。最后是对本文工作的总结与展望。用本文论述的方法能达到更高的成像分辨率。
[Abstract]:Synthetic Aperture Radar (SAR) imaging technology is a very important application in radar technology, and with UAV as motion carrier, high-resolution micro-#en0# real-time imaging technology has become a hot spot. The volume and weight of the micro SAR real-time imaging system on the UAV, This paper mainly discusses a kind of radar real-time imaging system based on monolithic FPGA. Firstly, this paper introduces the development and application of SAR real-time imaging processing technology. The imaging system based on FPGA is introduced. Then, the imaging principle of synthetic Aperture Radar (SAR) is analyzed and the main processing chip is selected. In the system design, the processing chip selected Z7 series chip. Zynq-7000 series product is the first chip to integrate dual core ARM and FPGA on a single chip. The main advantage of the chip. Arm processor is that it can efficiently. Control system flow. For complex high-precision algorithms, such as motion parameter estimation, Doppler center estimation) can also be processed by the ARM processor. And the integrated FPGA in the chip can complete the main algorithm flow of imaging. Data preprocessing is an important link to realize real-time imaging. Digital downconversion converts the digital signal directly collected by if into baseband signal. The data processed by digital down-conversion is filtered and extracted. Filtering decimation reduces the amount of data while ensuring that the distance signal is not distorted and saves resources.; the azimuth prefiltering ensures that the azimuth signal is not distorted and the amount of data is reduced at the same time. Increase the processing time interval. The data before azimuth pre-filtering is 10kHz, and after azimuth pre-filtering, the data repetition frequency is 500Hz. It mainly includes primary compensation, range migration correction and azimuth compression. First compensation, range migration correction operation makes the imaging clearer and higher resolution. After azimuth pulse compression, the system image processing is finally realized. For more efficient imaging processing, this paper presents the idea of module multiplexing. According to the structural characteristics of primary compensation, range migration correction and azimuth pulse compression, the three modules are multiplexed with one module. Finally, a SAR image with a azimuth data bit 81922 and a data repetition frequency of 500Hz is required to complete the processing of a picture in 16s. In this system, the image processing can be completed in 10s. Therefore, the requirements of real-time imaging are achieved, and the task targets are fulfilled. Finally, the work of this paper is summarized and prospected. The method discussed in this paper can achieve higher imaging resolution.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN957.52

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