LDPC码编译码器的设计与实现

发布时间：2018-03-24 04:18

本文选题：深空通信　切入点：LDPC码　出处：《哈尔滨工业大学》2014年硕士论文

【摘要】：LDPC码在深空通信中有很好的实用价值，同时LDPC码也被广泛应用于光纤通信、卫星数字视频和音频广播等领域。在加性高斯白噪声信道环境下，BPSK调制时，归一化最小和译码算法能很好地平衡译码性能和算法复杂度，易于硬件实现，且常以流水线的形式出现在译码器的设计中。本文针对LDPC译码器提出一种新的设计思路，将流水线思想从译码算法本身扩展到译码器的整体设计中，设计出可以多帧并行且结构简单的译码器，最后通过仿真与实现对其性能进行验证。本文主要的研究工作如下：首先，利用双对角QC-LDPC码校验矩阵的特点，设计双递归流水线编码器，详细介绍其编码原理与编码器的结构，并细致分析编码器的工作流程，给出仿真时序图与资源消耗情况。其次，按照LDPC码译码算法的演化进程对概率域BP算法、对数域BP算法以及归一化最小和算法分别进行介绍，并对它们的性能进行仿真比较。然后分别对归一化系数、迭代次数以及初始值量化位数等译码参数进行性能仿真，并根据仿真结果做出适当的选择。之后，提出流水线式译码器的设计思想，给出归一化最小和译码算法的流水线化方法，详细介绍流水线式译码器的结构与工作原理，针对规则与准循环LDPC码设计两款译码器，并给出仿真结果，提出进一步优化的方向。最后，将两组编码器和译码器在FPGA实验板上进行实现，在Matlab以及串口调试助手等软件的帮助下，通过串口与计算机进行配合，组成两套编译码系统，，实现数据的编译码工作，并检验编译码器在实际应用中的性能。
[Abstract]:LDPC codes have good practical value in deep space communication, and LDPC codes are also widely used in optical fiber communication, satellite digital video and audio broadcasting. The normalized minimum sum decoding algorithm can balance decoding performance and algorithm complexity well, and is easy to implement in hardware, and often appears in the design of decoder in the form of pipeline. This paper presents a new design idea for LDPC decoder. This paper extends pipeline's idea from decoding algorithm to the whole design of decoder, designs a decoder that can be parallel in multiple frames and has simple structure, and finally verifies its performance by simulation and implementation. The main research work of this paper is as follows:. Firstly, based on the characteristics of double-diagonal QC-LDPC code check matrix, a double-recursion pipeline encoder is designed, its coding principle and encoder structure are introduced in detail, the working flow of encoder is analyzed in detail, and the simulation sequence diagram and resource consumption are given. Secondly, according to the evolution of LDPC decoding algorithm, the probabilistic BP algorithm, logarithmic BP algorithm and normalized minimum sum algorithm are introduced, and their performance is simulated and compared. The decoding parameters such as the number of iterations and the quantization bit number of the initial value are simulated and the appropriate selection is made according to the simulation results. After that, the design idea of pipeline type decoder is put forward, and the algorithm of the normalized minimum sum decoding algorithm is given. Then, the structure and working principle of pipeline type decoder are introduced in detail. Two decoders are designed for regular and quasi-cyclic LDPC codes. The simulation results are given and the direction of further optimization is proposed. Finally, two groups of encoders and decoders are implemented on the FPGA experimental board. With the help of Matlab and serial port debugging assistant software, two sets of encoder and decoder system are formed to realize the work of encoding and decoding data with the help of serial port and computer. The performance of the encoder and decoder in practical application is also tested.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN911.2

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