基于Hi3515的视频传输终端的设计与实现

发布时间：2018-03-24 06:06

本文选题：DVB-T系统　切入点：Hi3515编码器　出处：《电子科技大学》2014年硕士论文

【摘要】：随着人们对信息传输的效率和方式有越来越来高的要求,视频作为一种直观并且易于理解的信息传播方式被广泛应用于很多领域。DVB-T作为传统的地面无线视频广播传输具有成熟、应用面广等优势,但是DVB-T难以与网络互联,特别是目前大量出现的高性能网络视频编码器与DVB-T调制器无法直接互联,无法构成更加高效、更经济的视频终端,因此亟需设计一种更加高效的视频传输终端。针对DVB-T传统视频传输终端的不足以及现实的需要,本文设计并实现了一种基于DVB-T视频传输方式下新的视频传输终端。新的视频传输终端不仅在一个物理信道上能够传送多路视频,而且利用高效率的视频编码方案以降低传输带宽。信源端视频采用比较成熟H.264编码方法,替代了传统DVB-T中效率低的MPEG-2编码方法,并且多路视频以TS流的形式进行打包和复用。新的视频传输终端的开发涉及到嵌入式软件开发、FPGA逻辑设计和硬件电路设计。视频编码及复用在基于Hi3515的嵌入式Linux下开发完成,接着利用FPGA完成TS视频流的处理,最后实现了DVB-T信道调制板的单板设计。本文主要完成了以下几点设计:1、分析实现了基于Hi3515的多路H.264编码ES流的TS封装和复用。分步实现了H.264编码ES流到PES流的封装以及PES流到TS流的封装过程,实现了多路视频的TS复用,在此过程中实现了TS流中各种数据的插入以及时间标签的计算。2、实现了TS视频流输出的FPGA处理。本文提出了两种方案对Hi3515输出的TS流进行FPGA的实时处理。一种方案是直接利用FPGA接收处理来自Hi3515MII接口的视频流数据;另外一种方案是利用FPGA驱动网卡芯片进行UDP包的接收再处理。FPGA主要完成了网卡驱动、TS包的过滤、异步FIFO的视频数据读写以及TS流的恒码率匹配输出等功能。3、设计并实现了DVB-T信道调制板。硬件单板以TMS320C6413作为主控芯片,CPLD完成接口和逻辑控制部分的功能,然后配合其余功能芯片完成设计。硬件单板PCB采用六层板设计,单板工作稳定可靠。4、利用设计的视频传输终端和已有的DVB-T接收设备,完成整个DVB-T系统的视频收发测试,测试结果良好。
[Abstract]:With the increasing demands on the efficiency and mode of information transmission, as an intuitive and easy to understand way of information transmission, video has been widely used in many fields. DVB-T as the traditional terrestrial wireless video broadcast transmission has become mature. However, DVB-T is difficult to interconnect with the network, especially the high performance network video encoder and DVB-T modulator can not be directly interconnected, and can not form a more efficient and more economical video terminal. Therefore, it is urgent to design a more efficient video transmission terminal. In this paper, a new video transmission terminal based on DVB-T video transmission mode is designed and implemented. In addition, the high efficiency video coding scheme is used to reduce the transmission bandwidth. The source video adopts more mature H.264 coding method, which replaces the inefficient MPEG-2 coding method in traditional DVB-T. And the multi-channel video is packaged and multiplexed in the form of TS stream. The development of the new video transmission terminal involves the logic design and hardware circuit design of the embedded software development. The video coding and multiplexing is completed under the embedded Linux based on Hi3515. Then using FPGA to complete TS video stream processing, Finally, the single board design of DVB-T channel modulator board is implemented. This paper mainly completes the following design: 1, analyzes and implements the TS encapsulation and multiplexing of multi-channel H.264 encoded es stream based on Hi3515, and realizes the sealing of H.264 encoding es stream to PES stream step by step. Package and package process of PES stream to TS stream, The TS multiplexing of multi-channel video is realized. In this process, the insertion of various data in TS stream and the calculation of time label. 2 are realized, and the FPGA processing of TS video stream output is realized. In this paper, two schemes are proposed for FPGA real-time processing of TS stream output from Hi3515. FPGA is used to receive and process video stream data from Hi3515MII interface directly. Another scheme is to use FPGA driver card chip to receive and reprocess UDP packets. The functions of asynchronous FIFO video data reading and writing and TS stream constant bit rate matching output are as follows. 3. The DVB-T channel modulation board is designed and implemented. The hardware veneer uses TMS320C6413 as the main control chip to complete the interface and logic control functions. Then complete the design with other functional chips. The hardware veneer PCB is designed with six-layer board, and the veneer works stably and reliably. The designed video transmission terminal and the existing DVB-T receiving equipment are used to complete the video transceiver test of the whole DVB-T system. The test results are good.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN919.81

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