双选信道下OFDM系统的FPGA实现

发布时间：2018-04-15 10:03

本文选题：OFDM + FPGA　；参考：《电子科技大学》2014年硕士论文

【摘要】：本文研究内容基于XX研究所合作项目,主要讨论了该项目的工程实现方法,此项目在以FPGA和DSP为核心架构的硬件平台上完成,本文主要讨论其中的FPGA实现部分以及FPGA与DSP的接口协议。具体而言,主要包括以下几方面的工作:(1)根据已有的matlab仿真程序设计发射机结构,划分模块并实现仿真算法各项功能。介绍发射机信号源处理、数据预处理、信令域处理、峰均比抑制、组帧等模块的实现框图、接口信息、处理流程,并给出仿真时序图。然后设计中频发射模块,将一定速率的基带数字信号通过数模转换器转换成模拟信号,调制信号到指定中频频率并发射出去。(2)设计接收机中采样、下变频、低通滤波及抽取的方案,并恢复基带数据。介绍接收机下变频、低通滤波和抽取、自动增益控制、帧同步等模块的实现框图、接口信息和处理流程。(3)设计FPGA与DSP之间的数据传输协议,介绍接收机FPGA和DSP的接口定义和数据传输流程,说明FPGA和DSP的传输协议。(4)给出项目的测试指标,介绍峰均比、传输带宽及BER的测试方案。对要求的指标进行测试并分析测试结构。对比测试结果与仿真性能,给出最终结论。
[Abstract]:This paper is based on XX Institute cooperation project, mainly discusses the engineering implementation method of the project, this project is completed on the hardware platform with FPGA and DSP as the core architecture.This paper mainly discusses the part of FPGA implementation and the interface protocol between FPGA and DSP.Specifically, it mainly includes the following aspects: 1) Design the transmitter structure according to the existing matlab simulation program, divide the modules and realize the functions of the simulation algorithm.This paper introduces the block diagram, interface information and processing flow of transmitter signal source processing, data preprocessing, signaling domain processing, peak to average ratio suppression, frame formation and so on, and gives the simulation sequence diagram.Then the intermediate frequency transmitting module is designed, the baseband digital signal of a certain rate is converted into analog signal by digital-analog converter, and the signal is modulated to the designated if frequency and transmitted out.Low-pass filtering and decimation scheme, and recovery of baseband data.The implementation block diagram, interface information and processing flow of receiver down-conversion, low-pass filtering and decimation, automatic gain control, frame synchronization and other modules are introduced to design the data transmission protocol between FPGA and DSP.This paper introduces the interface definition and data transmission flow of receiver FPGA and DSP, explains the transmission protocol of FPGA and DSP. It gives the test index of the project, and introduces the peak to average ratio, transmission bandwidth and the test scheme of BER.Test the required indicators and analyze the test structure.Finally, the final conclusion is given by comparing the test results with the simulation results.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN791;TN929.53

【共引文献】