短猝发低谱密度信号接收技术研究与实现

发布时间：2018-05-18 08:53

本文选题：短猝发 + 扩频　；参考：《西安电子科技大学》2015年硕士论文

【摘要】：随着现代通信技术的快速发展,人们对通信系统的抗干扰和抗截获能力要求越来越高,尤其在军事通信中这种需求更为迫切。本文对抗干扰和抗截获相关理论进行了探讨,设计出了一种基于短猝发、扩频技术与LDPC码的通信方案,实现了一种抗干扰和抗截获性能较好的通信系统。为了使本系统抗截获性能得到进一步提升,还与合作单位的子带分割、子带合并模块进行了联试。信号频谱按照既定规则被分割成多个子带后,即使敌方截获信号后也很难恢复出原信号。本文的主要内容及工作如下:1.对系统关键技术进行了深入的研究,包括匹配滤波、同步捕获、扩频解扩技术、LDPC码编译码理论。此外,本文还对设计中使用的PMF-FFT方法做了详细的推导。2.对系统中关键模块进行了Matlab仿真分析,给出了该系统的性能仿真结果,满足设计要求。本文在讨论同步捕获模块时,提出了一种改进的同步捕获方案,并对改进方案性能做了仿真分析。3.在FPGA实现时,提出了一种可以实现实时同步捕获的设计方案,该方案可以将同步捕获模块进行时分复用,节省了大量的FPGA资源。4.基于Matlab定点程序对系统各模块进行FPGA设计,详细阐述了各模块的设计思想及实现过程,并进行功能仿真。然后,利用SignalTap II对系统进行了板级调试。5.对联试方案进行了分析,给出了联试后的系统结构框图。最后,利用SignalTapII对联试后程序进行了板级调试。
[Abstract]:With the rapid development of modern communication technology, people demand more and more anti-jamming and anti-interception ability of communication system, especially in military communication. This paper discusses the theory of anti-jamming and anti-interception, designs a communication scheme based on short burst, spread spectrum technology and LDPC code, and realizes a communication system with good performance of anti-jamming and anti-interception. In order to further improve the anti-interception performance of the system, the sub-band merging module is combined with the sub-band of the cooperative unit. After the signal spectrum is divided into several sub-bands according to the established rules, it is difficult to recover the original signal even after the enemy intercepts the signal. The main contents and work of this paper are as follows: 1. The key technologies of the system are studied, including matched filtering, synchronization acquisition, spread spectrum despreading technology and LDPC coding and decoding theory. In addition, this paper also makes a detailed derivation of the PMF-FFT method used in the design. The key modules of the system are simulated by Matlab, and the simulation results of the system performance are given to meet the design requirements. In this paper, an improved synchronization capture scheme is proposed, and the performance of the improved scheme is simulated and analyzed. In the implementation of FPGA, a design scheme that can realize real-time synchronous capture is proposed. This scheme can realize time division multiplexing of synchronization capture module and save a lot of FPGA resources. 4. Based on the fixed point program of Matlab, the FPGA design of each module of the system is carried out. The design idea and realization process of each module are described in detail, and the function simulation is carried out. Then, the system is debugged at board level by using SignalTap II. The test scheme is analyzed, and the system structure block diagram after the joint test is given. Finally, the board level debugging is carried out by using SignalTapII to test the program.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：E96;TN973.3

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