基于FPGA的LDPC码译码器研究及实现

发布时间：2018-05-19 19:02

  本文选题：低密度奇偶校验码 + 对数似然比置信传播译码算法　； 参考：《浙江工业大学》2014年硕士论文

【摘要】：通信系统一直被要求高质和高效,因此信道编码作为数字通信系统中不可或缺的一部分便越来越受到人们的重视。在上世纪60年代被Gallager发现的LDPC码正是信道编码中非常优异的一种码字。LDPC码优异的性能几乎接近于香农限,在信息传输研究中有着良好的应用前景,LDPC码译码器的硬件实现也是现如今热点研究的问题之一。本文在对LDPC码的基本概念做出系统介绍的基础上,介绍了LDPC码中几种不同的构造方法,并对不同的构造码字和码长进行了性能分析,确定选用基于IEEE 802.16e标准的QC-LDPC码。文中还介绍了几种不同的LDPC码译码算法,通过MATLAB仿真,在对性能和实现复杂度进行比较后,最终选定LLR BP译码算法进行后续的研究和硬件实现。然后针对选定的LLR BP译码算法和802.16e标准的QC-LDPC码,通过MATLAB工具进行性能仿真,在AWGN信道下,在量化范围、量化比特数、量化方式选择这三方面分别对输入信号和中间变量进行了性能仿真与对比,最后经过分析比较,提出了一种新型和有效的量化方案。最后,以FPGA为平台,设计了一种基于802.16e标准的QC-LDPC译码器,使用开发软件QuartusⅡ 9.0,运用硬件描述语言Verilog HDL对译码器各个模块进行划分,描述和综合实现,并用ModelSim软件对各个模块和总体的译码器进行了测试和仿真,通过仿真图的分析比较,确定个模块功能的正确性,并进行了一定的性能优化。
[Abstract]:Since communication systems are always required to be of high quality and efficiency, channel coding, as an indispensable part of digital communication systems, has attracted more and more attention. The LDPC code discovered by Gallager in the 1960s is just one of the most excellent codewords in channel coding. The excellent performance of LDPC code is almost close to the Shannon limit. The hardware implementation of LDPC decoder is one of the hot issues in the research of information transmission. Based on the systematic introduction of the basic concepts of LDPC codes, this paper introduces several different construction methods of LDPC codes, analyzes the performance of different construction codewords and code lengths, and determines the selection of QC-LDPC codes based on IEEE 802.16e standard. Several different decoding algorithms of LDPC codes are also introduced in this paper. After comparing the performance and implementation complexity of LLR BP decoding algorithm through MATLAB simulation, the LLR BP decoding algorithm is selected for subsequent research and hardware implementation. Then, for the selected LLR BP decoding algorithm and 802.16e standard QC-LDPC code, the performance simulation is carried out by MATLAB tools. In the AWGN channel, the quantization bit number is quantized in the range of quantization. The performance of the input signal and the intermediate variable is simulated and compared in the three aspects of quantization method. Finally, a new and effective quantization scheme is proposed after analysis and comparison. Finally, a QC-LDPC decoder based on 802.16e is designed on the platform of FPGA. Using the development software Quartus 鈪，

本文编号：1911271