当前位置:主页 > 科技论文 > 网络通信论文 >

高帧频图像采集与传输系统的研究

发布时间:2018-05-26 10:59

  本文选题:高帧频 + FPGA ; 参考:《电子科技大学》2014年硕士论文


【摘要】:随着高帧频数字相机的出现,视频图像的数据量越来越大,这对数据的采集、传输与处理的各项技术指标提出了更高的要求。高帧频相机具有数据量大、输出帧频高的特点,为了保证图像数据的高速稳定采集与传输,本文设计了高帧频图像的采集传输系统。现场可编程逻辑门阵列的快速发展使得许多复杂、高速的图像处理运算的实现成为可能。Camera Link标准定义了数字相机采集接口,它是一个高速串行通信协议,Camera Link接口可以使相机的连接更加灵活简单,在图像采集中得到了广泛的应用。PCI Express是新一代的高速串行I/O总线,可以应用于各类计算机与外部设备之间的互连通信,它为嵌入式系统的传输接口提供了理想的解决方案。IEEE 1394b串行总线是在IEEE 1394a的基础上发展而来的,可以进行高速、远距离的传输,已经被广泛应用于众多领域中。本文介绍了目前较为先进的Camera Link、PCI Expresss以及IEEE 1394b总线技术,并根据这些技术标准设计了基于FPGA平台的高帧频图像采集与传输系统。该系统采用Altera公司的FPGA芯片作为主要的内核处理单元,使用Verilog语言实现FPGA的内部逻辑,基于Camera Link接口进行图像数据的采集,并将采集到的图像通过异步FIFO缓冲模块存储到DDR2 SDRAM中,然后通过PCI Express接口将数据传输到上位机。另外,本文在PCI Experss传输模块的基础上,介绍了1394b的传输方案,能够实现图像数据的远距离高速传输。本文主要分两大部分对采集与传输系统进行描述:图像采集部分和数据传输部分。对于采集部分,本文介绍了基于Camera Link接口的硬件电路以及软件程序的设计,实现图像数据接收和缓存处理、FPGA与相机之间的串行通信以及FPGA对相机接口的控制。对于图像的传输部分,本文介绍了PCIE传输模块和1394b传输模块。首先在了解PCIE协议规范的基础上,研究了PCIE IP硬核的产生方法以及PCIE传输部分应用逻辑的设计,实现了PCIE各分层协议的功能,并详述了PCIE总线数据传输的实现方案。然后在PCIE总线接口的基础上,结合1394b所采用的物理层和链路层芯片,讲述了IEEE 1394b的芯片电路设计以及FPGA的NIOS II编程,设计了利用1394b总线进行远距离传输的方案。总之,本文设计了基于FPGA的高帧频图像采集与传输系统,并对系统进行仿真测试,验证了该系统的采集与传输功能。
[Abstract]:With the emergence of high frame rate digital camera, the amount of video image data is increasing, which puts forward higher requirements for the data acquisition, transmission and processing of various technical indicators. The high frame rate camera has the characteristics of large amount of data and high output frame frequency. In order to ensure the high-speed and stable acquisition and transmission of image data, a high frame rate image acquisition and transmission system is designed in this paper. With the rapid development of the field programmable logic gate array, the realization of high-speed image processing is possible. The camera Link standard defines the digital camera acquisition interface. It is a high-speed serial communication protocol and camera Link interface can make camera connection more flexible and simple. It has been widely used in image acquisition. PCI Express is a new generation of high-speed serial I / O bus. It provides an ideal solution for the transmission interface of embedded system. IEEE1394b serial bus is developed on the basis of IEEE 1394a. Long distance transmission has been widely used in many fields. This paper introduces the advanced Camera link Expresss and IEEE 1394b bus technology, and designs a high frame rate image acquisition and transmission system based on FPGA platform. The system uses Altera FPGA chip as the main core processing unit, uses Verilog language to realize the internal logic of FPGA, and collects image data based on Camera Link interface. The collected images are stored in the DDR2 SDRAM by asynchronous FIFO buffer module, and then transmitted to the host computer through the PCI Express interface. In addition, on the basis of PCI Experss transmission module, this paper introduces the 1394b transmission scheme, which can realize long distance and high speed transmission of image data. This paper is divided into two parts to describe the acquisition and transmission system: image acquisition and data transmission. For the acquisition part, this paper introduces the design of hardware circuit and software program based on the Camera Link interface, realizes the serial communication between the image data receiving and buffer processing and the camera, and the control of the camera interface by FPGA. For the image transmission part, this paper introduces the PCIE transmission module and 1394b transmission module. Firstly, on the basis of understanding the PCIE protocol specification, the generation method of the PCIE IP hard core and the design of the application logic of the PCIE transmission part are studied. The functions of the PCIE layered protocols are realized, and the implementation scheme of the PCIE bus data transmission is described in detail. Then on the basis of PCIE bus interface, combined with the physical layer and link layer chip used in 1394b, the circuit design of IEEE 1394b chip and the NIOS II programming of FPGA are described, and the scheme of long-distance transmission using 1394b bus is designed. In a word, a high frame rate image acquisition and transmission system based on FPGA is designed, and the system is simulated and tested to verify the function of the system.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN919.8

【参考文献】

相关期刊论文 前1条

1 侯宏录;王蓉;杜鹃;;基于FPGA的CMOS传感器高速视频采集系统[J];光电技术应用;2010年05期



本文编号:1936985

资料下载
论文发表

本文链接:https://www.wllwen.com/kejilunwen/wltx/1936985.html


Copyright(c)文论论文网All Rights Reserved | 网站地图 |

版权申明:资料由用户f88ed***提供,本站仅收录摘要或目录,作者需要删除请E-mail邮箱bigeng88@qq.com