并网逆变器中全软件锁相环的设计与实现

发布时间：2018-06-05 02:29

本文选题：并网逆变器 + 软件锁相环　；参考：《南京理工大学》2014年硕士论文

【摘要】：能源危机导致当今社会对太阳能等新能源的渴求越来越旺盛,而通过光伏技术产生的直流电必须要经过逆变器变为交流电然后并入现有电网才能得到最大程度的利用。因此能够锁定电网频率及相位的锁相环技术的好坏将直接影响到逆变器的性能。如何利用DSP等数字芯片,设计出一个可以克服各种电网畸变及故障的软件锁相环,是当今科学研究的热点问题。本文首先论述的锁相环技术的发展历史及前景,简单阐述了传统的锁相环技术,指出了它们的缺点并提出了现阶段的电网条件下对锁相环的要求。论文的第二部分给出了锁相环的结构框图,并将锁相环分为三个部分：鉴相器、环路滤波器、压控振荡器,并给出了它们的数学模型；分析了鉴相器的基本原理并给出了它的鉴相特性,说明了常用的几种环路滤波器。在前面的基础上,分析了单同步旋转坐标系锁相环(SSRF-SPLL)的基本原理和结构,并利用MATLAB对其在各种电网畸变(如三相电压不平衡、电压突降、频率突降等)下的表现进行了仿真。仿真结果与数学分析相吻合,证明了三相不平衡时由于负序分量的影响,SSRF-SPLL的表现不佳。分析了双同步坐标系解耦软件锁相环(DDSRF-SPLL)和基于二阶广义积分的软件锁相环(SOGI-SPLL)的设计思路及结构框图,利用数学模型分析和仿真研究了它们的性能。结果证明两种锁相环可以滤除负序分量,因此在三相不平衡及高次谐波存在时都有较好的表现。最后,简单介绍了所用的TMS320F28335芯片并以它为基础搭建了实验平台,设计了软件的工作流程并为三种锁相环编写的相应的程序；设计了一个调理电路使得A/D采样模块可以采集三相电压；最后的结果证明了前面的理论分析。
[Abstract]:Because of the energy crisis, the demand for new energy, such as solar energy, is more and more strong. The direct current generated by photovoltaic technology must be converted from inverter to AC and then integrated into the existing power grid to get the maximum utilization. Therefore, the performance of the inverter will be directly affected by the PLL technology which can lock the frequency and phase of the power grid. How to design a software phase-locked loop (PLL) which can overcome all kinds of power network aberrations and faults by using digital chips such as DSP is a hot issue in current scientific research. In this paper, the development history and prospect of phase-locked loop (PLL) technology are discussed, the traditional PLL technology is briefly described, their shortcomings are pointed out and the requirements of PLL in the current power grid are put forward. In the second part of the paper, the structure block diagram of PLL is given, and the PLL is divided into three parts: phase discriminator, loop filter, voltage-controlled oscillator, and their mathematical models are given. The basic principle of the phase detector is analyzed, and its phase discrimination characteristics are given, and several common loop filters are explained. On the basis of the above, the basic principle and structure of SSRF-SPLL in single synchronous rotating coordinate system are analyzed, and the performance of SSRF-SPLL under various power grid distortions (such as three-phase voltage imbalance, voltage sudden drop, frequency abrupt drop) is simulated by MATLAB. The simulation results agree with the mathematical analysis and prove that the performance of SSRF-SPLL is not good due to the negative sequence component in the three-phase unbalance. The design idea and structure block diagram of DDSRF-SPLL and SOGI-SPLL based on second order generalized integral are analyzed. The performance of DDSRF-SPLL is analyzed and simulated by mathematical model. The results show that the two PLLs can filter out the negative sequence components, so they have better performance in the presence of three-phase unbalance and high-order harmonics. Finally, the TMS320F28335 chip is introduced briefly and the experimental platform is built based on it. The working flow of the software is designed and the corresponding program for the three PLL is designed. A conditioning circuit is designed so that the A / D sampling module can collect the three-phase voltage.
【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM464;TN911.8

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