基于FPGA的二维快速哈达玛变换

发布时间：2018-06-16 19:54

  本文选题：二维 + 哈达玛变换　； 参考：《西安电子科技大学》2014年硕士论文

【摘要】：数学变换作为数字信号处理的理论基础,是影响系统性能的决定因素,并且随着信息量与信号维数的增加,变换也更加耗时,这就需要更简便的变换算法与更合理的系统架构来对变换进行优化。哈达玛变换作为一种结构简便的非正弦类正交变换,拥有实数变换,变换只涉及到加、减法,反变换简单,存在快速算法且易于硬件实现等特点,这让哈达玛变换在数字信号处理领域有着广阔的前景。此外,迫于空间、计算耗时等限制,哈达玛变换基于硬件的应用并不尽如人意。对此,FPGA平台具有灵活性高、并行处理等优点,基于FPGA嵌入式硬件实现成为突破有关限制的选择方式,所以本论文要研究基于FPGA的哈达玛的实现,而目前对于哈达玛变换FPGA实现的相关研究多集中于一维与低点数。在现实中,图像是以二维信号的形式存在的,对图像进行处理的前提是需要将二维图像信号进行变换处理。基于以上背景及理论,本文着眼于哈达玛变换中传统的行列互换法对二维高点数的FPGA实现,以及新颖的二维块分法在FPGA上实现,并推广到高点数应用的可行性的研究,与二维哈达玛变换在图像处理中的相关应用。首先,论文介绍了沃尔什-哈达玛的研究背景与意义,对其现状与未来发展进行了论述。接着介绍了使用FPGA平台进行哈达玛变换的优点与关键技术。其次,论文介绍了哈达玛变换相关理论基础。在一维变换矩阵形式的基础上,通过将变换矩阵稀疏化推导了一维哈达玛变换的快速算法。对于二维快速算法,本文介绍了基于行列互换法与块分法两种算法,其中行列互换法采用了将二维变换通过矩阵行列互换分解成两次一维变换的方法实现了算法；块分法采用了一种“分块”方法,即通过对运算矩阵不断四等分的降维思想实现了算法。接着,论文开展了对基于这两种快速算法的二维哈达玛变换的FPGA设计的研究,分别通过基于Quartus Ⅱ与Modelsim的软件平台进行了设计与仿真,并通过Matlab验证了结果的正确性。其中,行列互换法的设计实现了对256*256点数的输入的处理,在实时性与误差满足了设计要求的前提下,将系统应用到了相应像素灰度图片变换的研究中；块分法对32*32点数的输入进行了仿真并验证。随后,论文针对硬件资源与运行速度两个方面对基于两种算法的设计进行了对比,并对于块分法的高点数推广进行了展望。研究结果表明,基于FPGA平台的行列互换法的二维FHT实现了高点数的设计并满足正确性与实时性：基于块分法的设计实现了对中低点数输入处理的目的,并对高点数应用进行了展望。
[Abstract]:As the theoretical basis of digital signal processing, mathematical transformation is the decisive factor that affects the performance of the system, and with the increase of information and signal dimension, the transformation becomes more time-consuming. This requires a simpler transformation algorithm and a more reasonable system architecture to optimize the transformation. As a non-sinusoidal orthonormal transform with simple structure, Hadamard transform has real number transformation, which only involves addition, subtraction, simple inverse transformation, fast algorithm and easy hardware implementation. This makes Hadamard transform have a broad prospect in the field of digital signal processing. In addition, due to the limitation of space and computation time, the application of Hadamard transform based on hardware is not satisfactory. The FPGA platform has the advantages of high flexibility, parallel processing and so on. The embedded hardware implementation based on FPGA has become the choice way to break through the limitation, so this paper will study the realization of Hadama based on FPGA. At present, most of the researches on FPGA implementation of Hadamard transform are focused on one dimension and low number. In reality, the image exists in the form of two-dimensional signal, and the premise of image processing is that the two-dimensional image signal needs to be transformed and processed. Based on the above background and theory, this paper focuses on the realization of 2D high point FPGA by the traditional column and column exchange method in Hadamard transform, and the feasibility study of the novel two-dimensional block partition method on FPGA, which is extended to the application of high number points. And 2D Hadamard transform in image processing. Firstly, the paper introduces the background and significance of Walsh-Hadamar's research, and discusses its present situation and future development. Then the advantages and key technologies of using FPGA platform for Hadamard transform are introduced. Secondly, the paper introduces the theoretical basis of Hadamard transform. Based on the form of one-dimensional transformation matrix, a fast algorithm of one-dimensional Hadamard transform is derived by thinning the transformation matrix. For the fast 2-D algorithm, this paper introduces two algorithms based on the row-column exchange method and the block division method, in which the row-column interchange method is implemented by decomposing the 2-D transformation into two one-dimensional transformation by matrix row-column interchange. The block partition method adopts a "block" method, that is, the algorithm is realized by reducing the dimension of the operation matrix. Then, the paper studies the FPGA design of 2D Hadamard transform based on these two fast algorithms, designs and simulates the software platform based on Quartus 鈪，

本文编号：2027914