高速宽带跳频系统基带处理模块的设计与实现

发布时间：2018-06-29 21:36

本文选题：跳频通信 + 软件无线电　；参考：《哈尔滨工业大学》2014年硕士论文

【摘要】：跳频技术是军事通信领域重要的通信技术之一，也是在民用通信领域有着广泛应用的先进技术，其优秀的抗干扰、抗截获能力以及在通信组网方面的良好性能，使它在现代通信中占有重要的地位。本文通过研究跳频通信的基本理论，以此为基础利用软件无线电技术完成了高速宽带跳频系统基带处理单元的设计，并利用自主设计的Xilinx FPGA硬件平台实现了从发信机到接收机的整套跳频基带处理功能。在硬件方面，以设计并制作完成的基带开发板为基础，完成了所需核心芯片的配置、调试工作，为后续工作打下了良好的基础。首先，DDS芯片与ADC芯片需要一个高度稳定的系统时钟，从硬件设计的角度选择ADI公司的AD9516芯片，通过串行总线完成了时钟芯片的配置工作，从而能够为DDS芯片和ADC芯片提供优质的时钟输入；其次，对高性能的DDS芯片AD9914完成了配置工作，分析了DDS芯片的性能；最后，完成了对高速ADC芯片和DAC芯片的配置工作，保证了后续数字信号处理工作和测试工作的顺利进行。在软件方面，通过ISE完成了收发信机基带处理模块的设计，包括DPSK调制与解调、DDS频率控制和跳频的同步捕获与跟踪。在跳频同步的设计上，采取了通过能量检测进行滑动调整的自同步法，介绍了同步的具体流程和实现方法，分析了系统同步捕获的性能和跟踪的精度。详细说明了DPSK的解调方法，从信号处理、位同步提取、载波跟踪几个方面进行了介绍。最后，，将设计完成的基带处理模块与射频模块相连接搭建了高速宽带的跳频系统。系统频率跳变速度20kHop/s，跳频点数255个，系统带宽500MHz。在收信机端，将解调数据通过FPGA测试管脚送至示波器观察，验证了解调的正确性；同时利用ISE自带的Chipscope软件观察基带处理模块中的关键信号，确保了各主要模块的正常工作，验证了方案的可行性与系统的正确性。
[Abstract]:Frequency hopping (FH) is one of the most important communication technologies in the field of military communication. It is also an advanced technology widely used in the field of civil communication. It has excellent anti-jamming, anti-interception capability and good performance in communication networking. Make it play an important role in modern communication. Based on the basic theory of frequency hopping communication, the design of baseband processing unit of high speed broadband frequency hopping system is completed by using software radio technology. The FH baseband processing function from transmitter to receiver is realized by using Xilinx FPGA hardware platform. In the aspect of hardware, based on the design and manufacture of the baseband development board, the configuration and debugging of the core chip are completed, which lays a good foundation for the follow-up work. First of all, the DDS chip and ADC chip need a highly stable system clock. The AD9516 chip of ADI Company is selected from the point of view of hardware design, and the configuration of the clock chip is completed by serial bus. It can provide high quality clock input for DDS chip and ADC chip. Secondly, the configuration of high performance DDS chip AD9914 is completed, and the performance of DDS chip is analyzed. Finally, the configuration of high speed ADC chip and DAC chip is completed. The following digital signal processing and testing work are ensured. In the aspect of software, the design of baseband processing module of transceiver is completed through ISE, including DPSK modulation and demodulation, DDS frequency control and synchronous acquisition and tracking of frequency hopping. In the design of frequency hopping synchronization, the self-synchronization method of sliding adjustment through energy detection is adopted, the concrete flow and realization method of synchronization are introduced, and the performance of system synchronization acquisition and the tracking accuracy are analyzed. The demodulation method of DPSK is described in detail, including signal processing, bit synchronization extraction and carrier tracking. Finally, the designed baseband processing module is connected with the RF module to build a high speed broadband frequency hopping system. The frequency hopping speed of the system is 20 kHops, the number of hopping points is 255, and the bandwidth of the system is 500 MHz. At the receiver end, the demodulation data is sent to the oscilloscope through the FPGA test pin to verify the correctness of the demodulation. At the same time, the key signals in the baseband processing module are observed by using the Chipscope software of ISE to ensure the normal operation of the main modules. The feasibility of the scheme and the correctness of the system are verified.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN914.41

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