宽带零中频收发前端的研究与设计
发布时间：2018-08-21 09:15
【摘要】：现代无线通信技术飞速发展,不同的对象有着不同的通信需求,软件无线电的思想是随着用户习惯和时代发展顺势被提出来的。它要求建立一个统一标准化的平台,而零中频结构简单,AD/DA靠近天线端,不仅是超外差结构的发展,同时也是软件无线电思想的应用。零中频架构具有体积小、功耗低、成本低的优势,如今在手机通信中已经被广泛地应用了,很多芯片供应商都推出了针对移动通信标准的零中频收发器；在雷达应用中,多功能相控阵雷达的通道数成千上万,而零中频架构的优势就凸显出来了。本文就是针对这样的应用背景,研究并设计出了基于FMC(FPGA Mezzanine Card)标准的宽带零中频收发前端。 本文主要完成的工作： 1.研究了收发机前端主要的结构,分析了各自的优势和存在的问题,根据应用背景,选择了零中频架构。 2.介绍了收发射频前端的技术指标,提出了总体设计方案,根据性能指标,选用合适器件,根据器件的性能参数对接收机系统进行信道选择性仿真、增益预算仿真、输出信号频谱仿真。 3.完成宽带零中频收发前端的硬件设计,包括本振模块设计、正交调制模块设计、正交解调模块设计、AD/DA模块设计和核心芯片间的接口设计等,阐述了射频PCB设计的要点。 4.对设计出来的FMC宽带零中频收发前端板卡进行测试,各功能模块良好工作,测试了其IQ幅相不平衡性。
[Abstract]:With the rapid development of modern wireless communication technology, different objects have different communication requirements. The idea of software radio has been put forward with the development of user habits and times. It requires the establishment of a unified and standardized platform, and the zero if structure is simple AD-DA near the antenna, which is not only the development of the superheterodyne structure, but also the application of the software radio idea. Zero-if architecture has the advantages of small size, low power consumption and low cost. Nowadays, it has been widely used in mobile communication. Many chip providers have introduced zero-if transceiver for mobile communication standard. There are thousands of channels for multi-functional phased array radar, and the advantages of zero intermediate frequency architecture are highlighted. In this paper, we study and design a wideband zero if transceiver front end based on FMC (FPGA Mezzanine Card) standard. The main work of this paper is as follows: 1. The main structure of the transceiver front-end is studied, and their advantages and problems are analyzed. According to the application background, the zero-if architecture is selected. This paper introduces the technical specifications of the transceiver RF front end, and puts forward the overall design scheme. According to the performance index, the appropriate device is selected, and the channel selectivity simulation and gain budget simulation are carried out according to the device performance parameters. Output signal spectrum simulation. 3. Complete the hardware design of wideband zero-if transceiver front end, including local oscillator module design, quadrature modulation module design, quadrature demodulation module design, AD-DA module design and interface design between core chips, etc. The main points of RF PCB design are described. 4. The design of FMC wideband zero-if transceiver front-end card is tested. The function modules work well and its IQ amplitude and phase imbalance is tested.
【学位授予单位】：南京信息工程大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN92
本文编号：2195254
[Abstract]:With the rapid development of modern wireless communication technology, different objects have different communication requirements. The idea of software radio has been put forward with the development of user habits and times. It requires the establishment of a unified and standardized platform, and the zero if structure is simple AD-DA near the antenna, which is not only the development of the superheterodyne structure, but also the application of the software radio idea. Zero-if architecture has the advantages of small size, low power consumption and low cost. Nowadays, it has been widely used in mobile communication. Many chip providers have introduced zero-if transceiver for mobile communication standard. There are thousands of channels for multi-functional phased array radar, and the advantages of zero intermediate frequency architecture are highlighted. In this paper, we study and design a wideband zero if transceiver front end based on FMC (FPGA Mezzanine Card) standard. The main work of this paper is as follows: 1. The main structure of the transceiver front-end is studied, and their advantages and problems are analyzed. According to the application background, the zero-if architecture is selected. This paper introduces the technical specifications of the transceiver RF front end, and puts forward the overall design scheme. According to the performance index, the appropriate device is selected, and the channel selectivity simulation and gain budget simulation are carried out according to the device performance parameters. Output signal spectrum simulation. 3. Complete the hardware design of wideband zero-if transceiver front end, including local oscillator module design, quadrature modulation module design, quadrature demodulation module design, AD-DA module design and interface design between core chips, etc. The main points of RF PCB design are described. 4. The design of FMC wideband zero-if transceiver front-end card is tested. The function modules work well and its IQ amplitude and phase imbalance is tested.
【学位授予单位】：南京信息工程大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN92
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