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HSUPA中MAC-es协议的FPGA硬件设计

发布时间:2018-08-27 09:06
【摘要】:HSUPA(高速上行分组接入)技术是WCDMA系统中上行链路的演进技术,,该技术通过采用更容易实现的E-DCH复合编解码传输、可选的更短的时间间隔(TTI)、HARQ重传机制等关键技术,可大幅度提高WCDMA系统的上行数据传输速率。 本论文首先介绍WCDMAHSUPA的技术特点和发展状况,阐述了HSUPA的专有结构和特性,对HSUPA关键技术如Node B控制的调度、HARQ、更短的TTI进行了描述。 随后,为实现更大的上行数据传输吞吐率,着重分析了HSUPA技术中MAC-es协议层在FPGA上的实现过程,以Verilog语言为基础对系统进行了设计及实现,包括MAC-es协议层系统的架构、基于FPGA的系统各子层的实现方案,其中重点介绍了HSUPA数据包重排序问题的处理方法和MAC-es层数据包PDU的解析与分流。 最后编写了测试用例,搭建了系统仿真测试平台,使用ModelSim软件对设计方案进行了单元功能及系统级功能仿真与测试。仿真结果表明,本论文提出的方案能够实现设计目标,是切实可行的。
[Abstract]:HSUPA (High Speed uplink packet access) technology is the evolution technology of uplink in WCDMA system. This technology adopts the more easily realized E-DCH composite codec transmission, the optional shorter time interval (TTI) / HARQ retransmission mechanism and so on. The uplink data transmission rate of WCDMA system can be greatly improved. This paper first introduces the technical characteristics and development of WCDMAHSUPA, expounds the proprietary structure and characteristics of HSUPA, and describes the key technologies of HSUPA, such as Node B control scheduling and shorter TTI. Then, in order to realize more uplink data transmission throughput, the implementation process of MAC-es protocol layer on FPGA in HSUPA technology is analyzed emphatically. The system is designed and implemented based on Verilog language, including the architecture of MAC-es protocol layer system. The implementation scheme of each sub-layer of the system based on FPGA is introduced, in which the processing method of the HSUPA packet reordering problem and the parsing and shunting of the MAC-es layer packet PDU are introduced. Finally, the test cases are written, the system simulation and test platform is built, and the unit function and system-level function simulation and test are carried out with ModelSim software. The simulation results show that the proposed scheme can achieve the design goal and is feasible.
【学位授予单位】:华中科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN929.5

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1 朱元林;HSUPA中MAC-es协议的FPGA硬件设计[D];华中科技大学;2014年



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