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基于LFSR的CRC校验码在FPGA上的实现

发布时间:2018-09-11 09:46
【摘要】:在通信过程中常使用循环冗余编码(CRC)进行差错控制.CRC校验可以通过软件和硬件两种方法实现,在基于硬件的方法中,可用线性反馈移位寄存器(LFSR)实现CRC的校验计算.以LFSR电路为基础,用FPGA实现了CRC校验码的串行和并行两种算法,利用QuartusⅡ软件设计了串行和并行算法的Verilog HDL代码.Modelsim软件的仿真验证结果表明:基于LFSR设计的CRC串行算法具有实现原理简单,耗时较长的特点;并行算法虽然过程复杂繁琐,但效率高、耗时短.
[Abstract]:In the process of communication, the cyclic redundant coding (CRC) is often used for error control. CRC check can be realized by both software and hardware. In the hardware-based method, the linear feedback shift register (LFSR) can be used to realize the verification calculation of CRC. Based on LFSR circuit, the serial and parallel algorithms of CRC check code are implemented with FPGA. The simulation results show that the CRC serial algorithm based on LFSR has the characteristics of simple realization principle and long time consuming, while the parallel algorithm is complicated, and the simulation results show that the CRC serial algorithm based on LFSR has the characteristics of simple realization principle, long time consuming, and complex parallel algorithm, and the simulation results show that the parallel algorithm has the advantages of simple implementation principle and long time consuming. But the efficiency is high and the time is short.
【作者单位】: 兰州交通大学光电技术与智能控制教育部重点实验室;
【分类号】:TN911.2;TN791

【参考文献】

相关期刊论文 前3条

1 刘璐;武明亮;何俊强;;基于循环冗余校验码的差错控制分析与实现[J];成都大学学报(自然科学版);2011年01期

2 毕研珍;王U,

本文编号:2236341


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