基于多核DSP的信号采集处理板设计

发布时间：2018-10-08 14:28

【摘要】：随着科技的不断发展,雷达系统对信号采集处理板卡的要求也在不断的提升。与此同时,日益复杂的实时信号处理算法对信号采集处理板的处理速度、数据吞吐量等方面的要求也在不断的提高。随着信号采集处理板卡应用领域的不断扩大,各类平台对信号采集处理板的体积、功耗以及工作环境等各方面也有了更高的要求。在此背景下,本文提出了一种新的信号采集处理板的设计方案。考虑到信号采集处理板精度高、体积小、处理速度高、数据吞吐量大以及板卡的通用性和可扩展性的要求,设计时,板卡以一片高精度AD、一片高性能FPGA、一片多核DSP和CPCI-E标准总线为基本架构,以高速串行总线连接各主要芯片。本文首先分析了板卡的系统需求,针对板卡的系统需求完成了主要芯片选型工作并介绍了CPCI-E标准总线平台,接下来给出了板卡上电源系统和时钟系统的设计思路、原理及方法,然后设计并调试了板卡中高速串行总线(SRIO、PCIE、千兆以太网)的设计原理,实现了板卡中高速数据的交换,着重说明了SRIO接口的传输速率、工作流程,并完成接口稳定性测试,最后完成了板卡的远程动态加载。本文完成了信号采集处理板的硬件设计、高速接口设计以及多核DSP的引导加载等方面的工作,具有一定的工程应用价值。
[Abstract]:With the development of science and technology, the requirement of radar system for signal acquisition and processing card is also increasing. At the same time, the increasingly complex real-time signal processing algorithm for the signal acquisition processing board processing speed, data throughput and other aspects of the requirements are constantly improving. With the continuous expansion of the application field of the signal acquisition and processing board, all kinds of platforms have higher requirements on the volume, power consumption and working environment of the signal acquisition and processing board. Under this background, a new design scheme of signal acquisition and processing board is presented in this paper. Considering the requirements of high precision, small volume, high processing speed, large data throughput and the universality and expansibility of the board, the signal acquisition and processing board is designed, The board is based on a high precision AD, a high performance FPGA, a multi core DSP and CPCI-E standard bus, and connects the main chips with a high speed serial bus. This paper first analyzes the system requirements of the board, completes the selection of the main chips according to the system requirements of the board, and introduces the CPCI-E standard bus platform, then gives the design ideas, principles and methods of the power supply system and the clock system on the board card. Then the design principle of high speed serial bus (SRIO,PCIE, Gigabit Ethernet) is designed and debugged, and the high speed data exchange in the card is realized. The transmission rate and workflow of the SRIO interface are explained emphatically, and the stability test of the interface is completed. Finally, the remote dynamic loading of the card is completed. In this paper, the hardware design of the signal acquisition and processing board, the design of high-speed interface and the loading of multi-core DSP are completed, which has certain engineering application value.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN911.7

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