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基于多核DSP与FPGA的雷达信号处理板设计

发布时间:2018-10-17 20:35
【摘要】:雷达技术以及数字信号处理技术的不断发展,使得人们对雷达信号处理板的性能要求越来越高,般的雷达信号处理板已经不能满足时下的需求。在不断提升的系统性能要求下,本文论述了款高性能雷达数字信号处理板的设计。 本文介绍了块基于多核DSP与FPGA的雷达信号处理板卡,该板卡包含片Xilinx V6FPGA和四片高性能多核DSP芯片TMS320C6678,,数据处理性能十分卓越。其中TMS320C6678集成了SRIO、PCIe、 Hyperlink等高速串行接口,能完成高速的数据传输。首先文中经过充分的评估,完成了板卡的电源模块、时钟模块以及接口模块的系统设计,然后对板卡上的核心电路作出解释和说明。在最后的调试部分,本文着重介绍了TMS320C6678的SPI程序加载以及FPGA的千兆以太网调试工作。整个板卡架构设计考虑到算法的映射,便于雷达信号处理,同时兼顾到板卡之间的互联。
[Abstract]:With the continuous development of radar technology and digital signal processing technology, the performance of radar signal processing board is becoming more and more demanding, and the radar signal processing board can not meet the current demand. In this paper, the design of high performance radar digital signal processing board is discussed. This paper introduces a radar signal processing board based on multi-core DSP and FPGA. The board consists of Xilinx V6FPGA and four high performance multi-core DSP chips TMS320C6678, data processing performance is very outstanding. TMS320C6678 integrates SRIO,PCIe, Hyperlink and other high-speed serial interfaces, which can complete high-speed data transmission. Firstly, the system design of the power supply module, clock module and interface module is completed, and then the core circuit on the card is explained and explained. In the final debugging part, this paper mainly introduces the SPI program loading of TMS320C6678 and the FPGA Gigabit Ethernet debugging. The whole card architecture design takes into account the algorithm mapping, which is convenient for radar signal processing, and also takes into account the interconnection between boards.
【学位授予单位】:西安电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN957.51

【参考文献】

相关期刊论文 前2条

1 包利民;潘奇;;VPX总线技术及其实现[J];电子机械工程;2012年02期

2 柳懿;;浅谈DSP与FPGA的对比和结合[J];中国水运(下半月);2008年12期



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