相控阵雷达波束控制技术研究

发布时间：2018-12-13 07:20

【摘要】：波控系统是有源相控阵雷达的重要组成部分,主要作用是形成特定指向、低旁瓣、能规避特定干扰的波束信号。本论文根据某型相控阵雷达项目实际需求,首先研究和仿真了如何形成规避特定波束指向干扰信号的零点调向算法,然后设计并且完成了一个能控制T/R模块幅度和相位参数的波束控制电路系统,最后针对该电路系统FPGA外围特点,将零点调向算法利用MODESIM进行具体功能化实现。本课题提出了一种新的波控机硬件实现方法,该波控机具有运算能力强大、数据吞吐能力强的特点;零点调向算法的工程化设计方法具有实现简便、通用性好的特点。算法仿真部分首先研究了均匀线阵的数学模型和波束形成的零点约束条件,利用最小二乘法和拉格朗日算子进行最优系数求解,得到了零点调向系数求解公式。此外,利用仿真分析了零阶约束条件对波束形成的影响,为后续工程化实现打下基础。算法FPGA实现部分首先对比了零点调向的几种常见方法,利用课题算法仿真结果设计出一种基于FPGA实现的零点调向方法。为实现和浮点DSP之间的无缝连接,所有数据采用IEEE754标准浮点单精度格式,实现主要涉及了向量和矩阵的乘加运算。底层利用IP核实现核心算法,采用状态机实现时序控制,整个过程利用MODESIM与QUARTUS II软件联合完成。波控电路系统实现部分首先分析和研究了经典的波控机结构组成,然后根据具体项目要求设计了DSP与FPGA混合架构的波控系统,最后经过焊接、调试后用于实际工程项目中。波控机核心运算单元采用ADI公司的TS101和ALTERA公司的EP2S90,它们构成的运算核心具有强大的数据处理能力。波控电路系统外围接口丰富,最多能控制8×8阵元的T/R模块,能进行网络和串口的上位机控制,有超过16个IO命令扩展接口。波控电路系统数据存储能力强大,有超过2G×8位的FLASH存储器可用于标校数据存储,以及512K×32位乒乓无缝RAM实时存储器。
[Abstract]:Wave control system is an important part of active phased array radar. The main function is to form a specific direction, low sidelobe, and avoid the special interference of the beam signal. According to the actual requirements of a phased array radar project, this paper first studies and simulates how to form a zero-point direction modulation algorithm to avoid the interference signal of a specific beam. Then, a beam-beam control circuit system which can control the amplitude and phase parameters of the T / R module is designed and completed. Finally, according to the peripheral characteristics of the circuit system FPGA, the zeroing algorithm is realized by using MODESIM. In this paper, a new method of realizing the hardware of the wave controller is presented, which has the characteristics of powerful operation ability and strong data throughput, and the engineering design method of the zero direction adjustment algorithm has the characteristics of simple realization and good generality. In the simulation part of the algorithm, the mathematical model of uniform linear array and the zero point constraint condition of beamforming are studied. The optimal coefficient is solved by using least square method and Lagrange operator, and the formula of zero point direction adjustment coefficient is obtained. In addition, the effect of zero order constraint on beamforming is analyzed by simulation. In the part of FPGA implementation, several common methods of zero direction adjustment are compared, and a zero direction adjustment method based on FPGA is designed by using the simulation results of the algorithm. In order to realize the seamless connection between DSP and floating-point, all the data adopt IEEE754 standard floating-point single-precision format, which mainly involves the multiplication and addition of vectors and matrices. In the bottom layer, the core algorithm is realized by IP core, the timing control is realized by state machine, and the whole process is accomplished by MODESIM and QUARTUS II software. In the realization part of the wave control circuit system, the structure of the classical wave control machine is analyzed and studied firstly, and then the wave control system based on the DSP and FPGA hybrid architecture is designed according to the specific project requirements. After welding and debugging, the system is used in the actual engineering project. The core operation unit of the wave control machine is composed of TS101 of ADI Company and EP2S90, of ALTERA Company, which have powerful data processing ability. The wave control circuit system has abundant peripheral interfaces and can control 8 脳 8 array elements of the T / R module at most. It can control the upper computer of network and serial port. There are more than 16 IO command extension interfaces. The data storage ability of the wave control circuit system is very powerful. The FLASH memory with more than 2G 脳 8 bits can be used for calibrating data storage and 512K 脳 32-bit ping-pong seamless RAM real-time memory.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN958.92

【参考文献】