电力线OFDM载波通信系统的FPGA原型设计

发布时间：2018-12-15 14:20

【摘要】：电力线载波通信(Power line communication, PLC)利用现有的电力线网络进行信息传输，无需重新布线，具有成本低、周期短、安装使用方便等一系列优点，在智能电网、智能家居、智能交通等领域应用广泛。近年来基于正交频分复用(orthogonal frequency division multiplexing,OFDM)技术的PLC被多个国际PLC标准组织所采纳，成为PLC领域的研究热点。基于OFDM技术的G3-PLC标准是由法国电力分销公司ERDF发起，Sagemcom和Maxim公司联合开发的用于智能电网的窄带PLC标准。本文在同步和信道估计等算法研究的基础上，设计了一种基于G3-PLC标准的电力线OFDM载波通信物理层FPGA原型系统。本文的主要工作如下： 1.在深入研究G3-PLC定时同步算法的基础上，改进了基于本地序列相关的定时同步算法，并对其进行了仿真。分析表明，改进的定时同步算法具有更高的精度，，适用的信噪比范围更宽。 2．针对G3-PLC标准特定的导频结构，提出了一种基于循环训练序列的信道估计方法，该方法实现复杂度低、资源消耗少、可兼容多种频段传输模式。仿真结果表明，本文方法提高了信道估计的性能，在低信噪比条件下效果更好。 3.针对G3-PLC标准物理层协议，搭建了全部物理层收发模块的MATLAB定点仿真平台，为FPGA原型系统设计提供了依据。通过定点仿真优化了FPGA原型系统的结构，据此，提出了一种G3-PLC物理层原型系统的总体设计方案，可兼容多种频带传输模式，并兼顾了系统性能和资源消耗的折中。 4.完成了G3-PLC物理层发射机模块的FPGA代码设计，包括加扰频、RS编码、卷积编码、重复编码、交织、映射调制和OFDM调制。本文对发射机输出的仿真信号与定点仿真的信号进行了比较，验证了设计结果的正确性。 5．完成了G3-PLC物理层接收机模块的FPGA代码设计，主要模块包括帧同步子系统，自动增益控制子系统，信道估计子系统， OFDM解调器，信道译码子系统等。本文在实验室的信号处理硬件平台上对接收机进行了实验验证，结果验证了所设计原型系统的正确性。实验中FPGA采用XILINX公司SPARTAN-6系列XC6SLX150T芯片，接收机所消耗的资源约占FPGA总资源的15%左右。本文完成了G3-PLC物理层原型系统的设计与验证，为下一步集成电路设计打下了坚实的基础，对我国电力线OFDM载波通信技术的广泛应用有重要意义。
[Abstract]:Power line carrier communication (Power line communication, PLC) makes use of the existing power line network to transmit information without rewiring. It has a series of advantages, such as low cost, short period, convenient installation and use, etc., in smart grid, smart home, etc. Intelligent transportation and other fields are widely used. In recent years, PLC based on orthogonal Frequency Division Multiplexing (orthogonal frequency division multiplexing,OFDM) technology has been adopted by many international PLC standard organizations, and has become a research hotspot in the field of PLC. The G3-PLC standard based on OFDM technology is a narrow band PLC standard for smart grid developed by ERDF, a French power distribution company, and jointly developed by Sagemcom and Maxim. Based on the research of synchronization and channel estimation algorithms, a prototype FPGA system based on G3-PLC standard for power line OFDM carrier communication physical layer is designed in this paper. The main work of this paper is as follows: 1. On the basis of deeply studying the timing synchronization algorithm of G3-PLC, this paper improves the timing synchronization algorithm based on local sequence correlation, and simulates it. The analysis shows that the improved timing synchronization algorithm has higher accuracy and wider range of signal-to-noise ratio. 2. Aiming at the specific pilot structure of G3-PLC standard, a channel estimation method based on cyclic training sequence is proposed. This method has the advantages of low complexity, low resource consumption and compatible with multiple frequency band transmission modes. The simulation results show that the proposed method improves the performance of channel estimation and achieves better performance under low signal-to-noise ratio (SNR). 3. Aiming at the G3-PLC standard physical layer protocol, the MATLAB fixed-point simulation platform of all physical layer transceiver modules is built, which provides the basis for the design of FPGA prototype system. The structure of FPGA prototype system is optimized by fixed-point simulation. Based on this, an overall design scheme of G3-PLC physical layer prototype system is proposed, which can be compatible with multi-band transmission modes and takes into account the compromise between system performance and resource consumption. 4. The FPGA code design of G3-PLC physical layer transmitter module is completed, including scrambling frequency, RS coding, convolution coding, repeat coding, interleaving, mapping modulation and OFDM modulation. In this paper, the simulation signal output by the transmitter is compared with that of the fixed point simulation signal, and the correctness of the design results is verified. 5. The FPGA code design of G3-PLC physical layer receiver module is completed. The main modules include frame synchronization subsystem, automatic gain control subsystem, channel estimation subsystem, OFDM demodulator, channel decoding subsystem and so on. The experimental results of the receiver on the signal processing hardware platform of the laboratory verify the correctness of the designed prototype system. In the experiment, XILINX SPARTAN-6 series XC6SLX150T chip is used in FPGA, and the resource consumed by the receiver is about 15% of the total FPGA resource. This paper has completed the design and verification of G3-PLC physical layer prototype system, which has laid a solid foundation for the next integrated circuit design, and has great significance for the wide application of power line OFDM carrier communication technology in China.
【学位授予单位】：南京航空航天大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN913.6

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