单载波频域均衡64QAM链路物理层设计与实现
发布时间：2018-12-16 21:29
【摘要】：软件无线电由于具有可编程性、可重构性以及模块化设计等优势,因此基于该平台实现通用数字通信链路,在教学演示与科研验证中具有现实可用性和可推广性。为此,论文基于团队自主研发的uSDR软件无线电平台上,设计了单载波频域均衡64QAM数据链路,并在该平台上完成了演示验证。论文的具体内容如下:第一,单载波频域均衡64QAM链路的设计。从工程实现的角度研究了该链路物理层设计的关键技术,根据项目对链路的功能需求和性能需求,参考其它常用通信链路的设计方案,设计出该链路物理层帧结构。论文设计链路的每帧持续时长10ms,数据业务速率为32.8704Mbps。本文将整个链路数据信号处理流程分为发射机与接收机两部分,给出了各关键模块的详细设计方案。第二,单载波频域均衡64QAM链路的图形化开发。论文采用了Xilinx提供的图形化开发工具System Generator完成了链路的开发。在FPGA上实现了包括链路的上下变频模块、时频同步模块、调制编码模块等关键模块,并完成了全链路的误码率性能和时间同步性能的仿真。第三,单载波频域均衡64QAM链路的演示验证。在团队自主研发的软件无线电平台上完成了链路的功能测试与性能测试(包括文件传输测试、误码率测试、时间同步测试和抗频偏性能测试),基本满足了链路的设计指标,在性能与资源消耗取舍上选择了一个比较好的平衡点。论文基于软件无线电平台实现了单载波频域均衡64QAM链路,提供了通信系统常见信号处理模版,可用于通信教学演示与科研验证,丰富了软件无线电通信链路库,为以后在软件无线电平台上进行更复杂的通信链路开发提供了参考。
[Abstract]:Because software radio has the advantages of programmability reconfiguration and modularization design it realizes the universal digital communication link based on the platform and has practical availability and extensibility in teaching demonstration and scientific research verification. Therefore, based on the uSDR software radio platform developed by the team, a single carrier frequency domain equalization 64QAM data link is designed and demonstrated on the platform. The main contents of this paper are as follows: first, the design of single carrier frequency domain equalization 64QAM link. The key technology of the physical layer design of the link is studied from the point of view of engineering implementation. According to the functional and performance requirements of the link, the frame structure of the physical layer of the link is designed according to the design schemes of other commonly used communication links. In this paper, the duration of each frame is 10 msand the data traffic rate is 32.8704 Mbps. In this paper, the whole link data signal processing flow is divided into transmitter and receiver, and the detailed design scheme of each key module is given. Second, the graphical development of single carrier frequency domain equalization 64QAM link. In this paper, System Generator, a graphical development tool provided by Xilinx, is used to complete the link development. The key modules such as up-down conversion module, time-frequency synchronization module, modulation and coding module are implemented on FPGA, and the BER performance and time synchronization performance of the whole link are simulated. Third, the demonstration of single carrier frequency domain equalization 64QAM link. The function test and performance test (including file transmission test, bit error rate test, time synchronization test and anti-frequency offset performance test) of the link are completed on the software radio platform independently developed by the team, which basically meets the design index of the link. A better balance is chosen between performance and resource consumption. Based on the software radio platform, this paper realizes the single carrier frequency domain equalization 64QAM link, provides the common signal processing template of the communication system, can be used for communication teaching demonstration and scientific research verification, and enriches the software radio communication link library. It provides a reference for the further development of more complex communication links on the software radio platform.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN92
本文编号：2383072
[Abstract]:Because software radio has the advantages of programmability reconfiguration and modularization design it realizes the universal digital communication link based on the platform and has practical availability and extensibility in teaching demonstration and scientific research verification. Therefore, based on the uSDR software radio platform developed by the team, a single carrier frequency domain equalization 64QAM data link is designed and demonstrated on the platform. The main contents of this paper are as follows: first, the design of single carrier frequency domain equalization 64QAM link. The key technology of the physical layer design of the link is studied from the point of view of engineering implementation. According to the functional and performance requirements of the link, the frame structure of the physical layer of the link is designed according to the design schemes of other commonly used communication links. In this paper, the duration of each frame is 10 msand the data traffic rate is 32.8704 Mbps. In this paper, the whole link data signal processing flow is divided into transmitter and receiver, and the detailed design scheme of each key module is given. Second, the graphical development of single carrier frequency domain equalization 64QAM link. In this paper, System Generator, a graphical development tool provided by Xilinx, is used to complete the link development. The key modules such as up-down conversion module, time-frequency synchronization module, modulation and coding module are implemented on FPGA, and the BER performance and time synchronization performance of the whole link are simulated. Third, the demonstration of single carrier frequency domain equalization 64QAM link. The function test and performance test (including file transmission test, bit error rate test, time synchronization test and anti-frequency offset performance test) of the link are completed on the software radio platform independently developed by the team, which basically meets the design index of the link. A better balance is chosen between performance and resource consumption. Based on the software radio platform, this paper realizes the single carrier frequency domain equalization 64QAM link, provides the common signal processing template of the communication system, can be used for communication teaching demonstration and scientific research verification, and enriches the software radio communication link library. It provides a reference for the further development of more complex communication links on the software radio platform.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN92
【参考文献】
相关期刊论文 前2条
1 林婧;王宏;方炜;余钟源;刘元安;;软件无线电的研究现状综述[J];计算机测量与控制;2011年10期
2 于风云,张平;QAM调制与解调的全数字实现[J];现代电子技术;2005年03期
，本文编号：2383072
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