后向投影算法并行计算系统设计

发布时间：2019-02-21 15:47

【摘要】：后向投影(back projection, BP)雷达成像算法是一种基于时域处理的雷达成像算法,具有很好的鲁棒性,适用于载机任意运动和非均匀孔径合成孔径雷达成像。尽管BP算法可以不加任何近似的应用在SAR成像中,但是它的计算效率很低,运算量与回波脉冲数和目标图像像素点数成正比,所以在高分辨率成像应用中运算量非常大,运算时间很长,所以如何提高算法运算效率成为当前亟待解决的问题。本文从并行化的角度出发对算法进行优化,在充分分析算法并发特征的基础上,提出三种并行优化方法,并设计了基于NoC多核的软硬件成像系统,有效提高了算法运算效率。根据FPGA实验结果,本文还提出两种系统实时成像方案,为该算法的实际应用提供两种途径。为加快多核成像系统的设计效率,本文首先采用C++和SystemC建立系统的C模型和TLM模型,从宏观上统一规划整个系统架构,对系统软硬件进行了合理划分,在早期对软硬件进行协同验证,缩短了系统设计周期。在系统模型的基础上,基于NoC和多核架构,设计相应的硬件和系统软件。并将算法中运算量最大而又具有良好并发性的反投影运算部分封装成硬件加速核,通过集成多个加速核,进一步提高算法运算效率。系统选用ARM处理器作为子系统的主控核,设计相应的并行软件,最终实现BP算法的高性能计算系统。在FPGA上对所设计的系统进行验证。对于8K*4K大小的目标图像,在PC上不经过加速的成像时间为5小时23分钟,而本系统的成像时间只需要5分10秒,加速比高达65倍,验证了所设计系统的有效性。最后,针对8K*4K大小目标图像在FPGA上的实验结果仍然无法满足实时成像应用需求这一问题,本文给出分析,并提出两种有效解决方案,为系统实际应用提供了有效解决途径。
[Abstract]:The backward projection (back projection, BP) radar imaging algorithm is a kind of radar imaging algorithm based on time domain processing. It has good robustness and is suitable for airborne arbitrary motion and non-uniform aperture synthetic aperture radar imaging. Although the BP algorithm can be used in SAR imaging without any approximation, its computational efficiency is very low. The computation quantity is in direct proportion to the number of echo pulses and the number of pixels in the target image, so it is very large in the application of high resolution imaging. The operation time is very long, so how to improve the efficiency of the algorithm becomes an urgent problem. In this paper, the algorithm is optimized from the point of view of parallelization. On the basis of fully analyzing the concurrency characteristics of the algorithm, three parallel optimization methods are proposed, and the hardware and software imaging system based on NoC multi-core is designed, which effectively improves the efficiency of the algorithm. Based on the experimental results of FPGA, two real time imaging schemes are proposed, which provide two approaches for the practical application of the algorithm. In order to accelerate the design efficiency of the multi-core imaging system, the C model and the TLM model of the system are established by C and SystemC firstly, and the whole system architecture is unified from the macro view, and the software and hardware of the system are divided reasonably. In the early stage of hardware and software co-verification, the system design cycle is shortened. Based on the system model, the corresponding hardware and software are designed based on NoC and multi-core architecture. The backprojection operation which has the largest computation and good concurrency in the algorithm is encapsulated into the hardware accelerating kernel. The efficiency of the algorithm is further improved by integrating several accelerating cores. The system chooses ARM processor as the main control core of the subsystem, designs the corresponding parallel software, and finally realizes the high performance computing system of the BP algorithm. The designed system is verified on FPGA. For the target image with the size of 8K*4K, the imaging time without acceleration on the PC is 5 hours and 23 minutes, but the imaging time of the system is only 5 minutes and 10 seconds, and the acceleration ratio is as high as 65 times. The validity of the designed system is verified. Finally, aiming at the problem that the experimental results of 8K*4K size target images on FPGA still can not meet the requirements of real-time imaging applications, this paper gives an analysis and puts forward two effective solutions, which provide an effective solution for the practical application of the system.
【学位授予单位】：南京大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN957.52

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