基于冲激体制的近炸引信系统研制

发布时间：2019-03-19 13:50

【摘要】：近年来,冲激体制的无线通信广泛受到了专家学者的关注,并逐渐应用到各个领域,主要包括军事雷达、民用雷达、电子对抗、反隐身、仪器仪表、超宽带通信等领域。冲激体制的通信方式凭借其分辨率高、抗干扰能力强、定位精确、硬件结构简单等优势呈现出良好的发展势态,但同时也面临着巨大的技术性挑战。本文基于冲激体制无线通信中的各种优势,设计研制了基于冲激体制的近炸引信系统。文章内容主要涵盖了低压超宽带脉冲源设计,超宽带信号接收机设计,整机数字逻辑设计三部分内容。在低压脉冲源设计方面,分析了SRD(阶跃恢复二极管)的工作机理,研究了几种典型电路结构。在ADS软件中对各个电路分别进行了仿真,分析了各个器件对结果的影响。进而逐步优化了电路结构,并在仿真结果的指导下进行了实验测试。该脉冲源电路具有结构简单、体积小、成本低、性能稳定等优点。在超宽带接收机方面,研究探讨了几种经典的接收方案,结合近炸引信这一特殊应用领域,设计出相应的接收电路。本设计采用高速比较器的锁存功能来将接收到的窄脉冲比较结果锁存下来,高精度延时器结合主控逻辑部分在脉冲回波到来时准确锁定高速比较器,实现脉冲展宽,同时达到数字化目的。在数字逻辑设计方面,采用编码方式来提高抗干扰能力。八位编码通过移位寄存器逐位移出触发脉冲源发射窄脉冲,然后在回波到来后用移位寄存器逐位移入八位已经数字化的编码,两者相比较来判断是否点火引爆炸弹。整个数字逻辑部分采用FPGA(可编程逻辑门阵列)来实现,与传统分立数字器件比较,它具有集成度高,开发周期短,性能稳定等优势。本设计采用ALTERA公司的CycloneIII系列的FPGA,首先在开发软件QuartusII中进行电路模块设计,然后在仿真软件ModelSim中进行逻辑仿真,最后下载到FPGA芯片上进行实测。
[Abstract]:In recent years, the wireless communication of impulse system has been paid more and more attention by experts and scholars, and has been gradually applied to various fields, such as military radar, civil radar, electronic countermeasure, anti-stealth, instrumentation, ultra-wideband communication and so on. Because of its advantages such as high resolution, strong anti-jamming ability, accurate positioning and simple hardware structure, the communication mode of impulse system presents a good development trend, but it is also facing huge technical challenges at the same time. Based on the advantages of wireless communication in impulse system, a proximity fuze system based on impulse mechanism is designed and developed in this paper. The main contents of this paper include the design of low-voltage ultra-wideband pulse source, the design of ultra-wideband signal receiver and the digital logic design of the whole machine. In the design of low voltage pulse source, the working mechanism of SRD (step recovery diode) is analyzed, and several typical circuit structures are studied. Each circuit is simulated in ADS software, and the influence of each device on the result is analyzed. Furthermore, the circuit structure is optimized step by step, and the experiment is carried out under the guidance of the simulation results. The pulse source circuit has the advantages of simple structure, small volume, low cost and stable performance. In the aspect of UWB receiver, several classical receiving schemes are studied and discussed. Combining with the special application field of proximity fuze, the corresponding receiving circuit is designed. In this design, the latch function of the high-speed comparator is used to latch the received narrow pulse comparison results, and the high-precision delay device combined with the main control logic part locks the high-speed comparator accurately when the pulse echo arrives, so that the pulse broadening can be realized. At the same time achieve the purpose of digitization. In the aspect of digital logic design, the coding method is adopted to improve the anti-jamming ability. The eight-bit code transmits narrow pulses by bit-by-bit shift registers out of the trigger pulse source, and then uses the shift registers to bit-by-bit into the eight-bit already digitized code after the echo arrives, and compares the two to determine whether to ignite the bomb or not. The whole digital logic part is realized by FPGA (Programmable Logic Gate Array). Compared with the traditional discrete digital devices, it has the advantages of high integration, short development period and stable performance. This design uses the FPGA, of CycloneIII series of ALTERA company to design the circuit module in the development software QuartusII firstly, then carries on the logic simulation in the simulation software ModelSim, finally downloads to the FPGA chip to carry on the measurement.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN92

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