多通道GNSS接收信号处理平台设计

发布时间：2019-03-27 10:56

【摘要】：随着科技发展,当今社会对全球导航卫星系统(GNSS)的定位通信需求越来越高。GNSS接收机正在从传统的单通道单模向多通道多模兼容、联合定位发展。然而较高的运算复杂度对硬件的实现提出了挑战。研究多通道GNSS接收信号处理平台对多通道多模卫星导航技术的研发有着重要的意义。本文采用高速ADC+FPGA+DSP的系统架构,设计10通道GNSS接收信号处理平台,能够兼容低中频、零中频、超外差的射频前端输出信号,实时对GNSS信号进行捕获、跟踪、定位解算,以及支撑复杂算法的研发与测试。本文研究工作主要为:1、设计平台的功能架构,将其划分为信号采集、信号解调与基带处理、信号解算与控制三大功能模块,分析各模块的性能与功能需求,采用ADC+FPGA+DSP的架构,对主芯片进行选型;2、结合GNSS信号处理的需求,根据各芯片内部和输入输出接口的电气特性和规格要求,完成平台的电路设计,并且探索部分电路的改进方法,例如改进的菊花链式调试电路、单端/差分兼容输入接口等;3、将信号完整性、电源完整性、电磁兼容的相关理论应用到平台的12层高速PCB设计上,结合实际环境进行布线前仿真,遍历各个布线场景的反射、串扰、EMI情况,得到最佳布线场景和约束要求,并在布线后仿真验证,完成平台的物理设计;4、细心研究DSP、FPGA的底层运作,梳理各个模块的配置流程,并根据高速走线的时序约束和平台需求来计算各个配置寄存器的参数,完成平台上DSP、FPGA的驱动程序设计,包括高速总线接口驱动、USB传输接口驱动等;5、对平台进行软硬件测试,包括测试电源、时钟、ADC采集、FPGA与DSP之间通讯,平台和上位机之间通讯等功能模块,在平台运行北斗二代、GPS定位程序,验证平台的有效性。
[Abstract]:With the development of science and technology, the global navigation satellite system (GNSS) is becoming more and more important in positioning and communication. The GNSS receiver is developing from single-channel, single-mode to multi-channel multi-mode compatibility and joint positioning. However, the high computational complexity challenges the implementation of hardware. The research on multi-channel GNSS receiving signal processing platform is of great significance to the research and development of multi-channel multi-mode satellite navigation technology. In this paper, the system architecture of high-speed ADC FPGA DSP is used to design a 10-channel GNSS receiving signal processing platform, which can be compatible with low intermediate frequency, zero middle frequency, super heterodyne RF front-end output signal, real-time acquisition, tracking and positioning of GNSS signal. And support the development and testing of complex algorithms. The main research work of this paper is as follows: 1. The functional architecture of the platform is designed, which is divided into three functional modules: signal acquisition, signal demodulation and baseband processing, signal calculation and control, and the performance and functional requirements of each module are analyzed. The main chip is selected according to the structure of ADC FPGA DSP. 2.According to the requirement of GNSS signal processing, according to the electrical characteristics and specifications of each chip and the input / output interface, the circuit design of the platform is completed, and the improvement methods of some circuits, such as the improved chrysanthemum chain debugging circuit, are explored. Single / differential compatible input interface, etc.; 3, the relevant theories of signal integrity, power integrity and electromagnetic compatibility are applied to the design of 12-layer high-speed PCB of the platform. The simulation before cabling is carried out with the actual environment, and the reflection, crosstalk and EMI of each cabling scene are traversed. The optimal routing scenario and constraint requirements are obtained, and the physical design of the platform is completed by simulation verification after routing. 4, carefully study the bottom operation of DSP,FPGA, comb the configuration flow of each module, calculate the parameters of each configuration register according to the time sequence constraints of high-speed wiring and platform requirements, and complete the driver design of DSP,FPGA on the platform. Including high-speed bus interface driver, USB transmission interface driver and so on; 5. Test the software and hardware of the platform, including power supply, clock, ADC acquisition, communication between FPGA and DSP, communication between platform and upper computer, and run Beidou second generation, GPS positioning program on the platform to verify the validity of the platform.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN967.1

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