基于FPGA的光纤高清数字视频传输系统的研究
发布时间：2019-04-19 09:39
【摘要】：本课题为视频图像大容量、高清、远距离的传输提供了具体的设计方案,实现了单路VGA(或DVI)非压缩高清视频的实时化与数字化的传输。系统采用模块化的设计方法,将整个系统划分为：图像采集模块、FPGA处理模块、图像显示模块、光接口模块等4个模块组成。系统设计采用了信源编码、时钟恢复技术以及光纤通信技术,在保证系统功能性的同时增强了系统的可靠性。系统采用信源编码技术,将行、场同步信号以及像素时钟信号编码插入到行消隐信号中发送,与传统的FPGA+外部SDRAM方式相比提高了速度,也解决了需要大容量的外部SDRAM缓存的问题。系统针对不同图像格式在传输过程中的快速切换的问题,利用Xilinx FPGA内部PLL动态配置的特点来设计同步时钟的恢复,可以在2us左右恢复像素时钟。测试结果表明：该系统能够传输图像的最高分辨率达到1280×1024@60Hz：传输图像格式的切换时间延迟在2us以内,且切换速度快,图像没有延迟和拖尾现象,整个系统工作稳定,实时传输视频效果良好。
[Abstract]:This paper provides a concrete design scheme for large-capacity, high-definition, long-distance transmission of video images, and realizes the real-time and digital transmission of single-channel VGA (or DVI) uncompressed high-definition video. The whole system is divided into four modules: image acquisition module, FPGA processing module, image display module and optical interface module. The system design adopts source coding, clock recovery and optical fiber communication technology, which not only ensures the function of the system, but also enhances the reliability of the system. The system uses the source coding technology to insert the line, field synchronization signal and pixel clock signal into the line blanking signal for transmission, which improves the speed compared with the traditional external SDRAM mode of FPGA. It also solves the problem of large capacity external SDRAM cache. Aiming at the problem of fast switching between different image formats in the process of transmission, the system uses the characteristics of dynamic configuration of PLL in Xilinx FPGA to design the recovery of synchronous clock, which can recover pixel clock around 2us. The test results show that the maximum resolution of the system can reach 1280 脳 1024x60Hz. The switching time delay of the transmitted image format is less than 2us, and the switching speed is fast. There is no delay and trailing phenomenon in the image, and the whole system works stably. Real-time video transmission effect is good.
【学位授予单位】：长沙理工大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN929.11
本文编号：2460829
[Abstract]:This paper provides a concrete design scheme for large-capacity, high-definition, long-distance transmission of video images, and realizes the real-time and digital transmission of single-channel VGA (or DVI) uncompressed high-definition video. The whole system is divided into four modules: image acquisition module, FPGA processing module, image display module and optical interface module. The system design adopts source coding, clock recovery and optical fiber communication technology, which not only ensures the function of the system, but also enhances the reliability of the system. The system uses the source coding technology to insert the line, field synchronization signal and pixel clock signal into the line blanking signal for transmission, which improves the speed compared with the traditional external SDRAM mode of FPGA. It also solves the problem of large capacity external SDRAM cache. Aiming at the problem of fast switching between different image formats in the process of transmission, the system uses the characteristics of dynamic configuration of PLL in Xilinx FPGA to design the recovery of synchronous clock, which can recover pixel clock around 2us. The test results show that the maximum resolution of the system can reach 1280 脳 1024x60Hz. The switching time delay of the transmitted image format is less than 2us, and the switching speed is fast. There is no delay and trailing phenomenon in the image, and the whole system works stably. Real-time video transmission effect is good.
【学位授予单位】：长沙理工大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN929.11
【参考文献】
相关期刊论文 前3条
1 韩红霞;郭劲;曹立华;耿爱辉;;基于FPGA的高速视频信息光纤传输方案设计[J];电子器件;2005年04期
2 朱奕丹;方怡冰;;基于FPGA的图像采集与VGA显示系统[J];计算机应用;2011年05期
3 张倩;胡健生;;RGB格式数据向BT.656视频标准转换的关键技术[J];液晶与显示;2011年05期
相关硕士学位论文 前1条
1 王锐煌;基于FPGA的嵌入式视觉检测系统及IP核设计[D];广东工业大学;2011年
，本文编号：2460829
本文链接：https://www.wllwen.com/kejilunwen/wltx/2460829.html
