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基于6678多核DSP的相位编码雷达信号处理

发布时间:2019-05-10 19:30
【摘要】:目前的各种体制的雷达,如机载雷达,舰载雷达,星载雷达,地面雷达等,若想做到很高的整体性能指标,就需要非常强的信号处理和数据处理能力。雷达系统所涉及的信号处理技术通常都具有数据量大、处理任务复杂、重复运算量大以及实时处理等特点。 本文结合雷达系统的应用,探讨了一种基于6678多核DSP以及sys/bios实时操作系统的雷达信号处理解决方案。首先对本文所使用的二相编码发射信号进行了设计与仿真,并分别从其时域和频域分析二相编码信号的特点。其次,对所要进行的雷达信号处理流程进行了论述并给出仿真。然后给出的是6678DSP芯片的简要介绍以及开发流程,对DSP的线程、EDMA3、多核通信的模块进行了设计,接着又基于DSP实现了之前仿真的雷达信号处理流程的各个模块,并给出实现结果,与仿真进行对比,验证了实现方案的可行性。 本文在最后论述了整个系统的调试过程,首先设计了调试所需的TargetConfiguration和Platform文件,并描述了其在系统中发挥的作用,之后分别调试了EDMA3和多核通信模块,验证了其可行性,并计算了整个过程所耗时间,验证了系统的实时性。
[Abstract]:At present, all kinds of radar, such as airborne radar, shipborne radar, satellite radar, ground radar and so on, need very strong signal processing and data processing ability if they want to achieve high overall performance index. The signal processing technology involved in radar system usually has the characteristics of large amount of data, complex processing tasks, large amount of repeated computation and real-time processing. Combined with the application of radar system, this paper discusses a radar signal processing solution based on 6678 multi-core DSP and sys/bios real-time operating system. Firstly, the two-phase coded transmit signal used in this paper is designed and simulated, and the characteristics of the two-phase coded signal are analyzed from its time domain and frequency domain, respectively. Secondly, the radar signal processing flow is discussed and the simulation is given. Then it gives a brief introduction of 6678DSP chip and the development flow. The thread of DSP and the module of EDMA3, multi-core communication are designed, and then each module of radar signal processing flow simulated before is realized based on DSP. The implementation results are given and compared with the simulation to verify the feasibility of the implementation scheme. At the end of this paper, the debugging process of the whole system is discussed. Firstly, the TargetConfiguration and Platform files needed for debugging are designed, and their functions in the system are described. Then, the EDMA3 and multi-core communication modules are debugged respectively, and their feasibility is verified. The time spent in the whole process is calculated, and the real-time performance of the system is verified.
【学位授予单位】:南京理工大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN957.51

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