硅基OLED微显示器驱动技术研究
[Abstract]:Silicon-based OLED microdisplay is a kind of flat panel display which makes OLED on silicon wafer. Its size is generally less than 1 inch. It makes use of mature CMOS technology to fabricate driving circuit on single crystal silicon wafer, and combines the advantages of OLED, such as large angle of view, fast response speed, low power consumption, all-solid state and so on. It can be used not only in personal entertainment equipment, but also in pilot helmet display and so on. It is one of the research hotspots of flat panel display technology at present. This paper starts with the pixel circuit design of silicon-based OLED microdisplay, and studies the driving technology of silicon-based OLED microdisplay. The main contents are as follows: 1, the pixel circuit design is due to the small pixel area in micro-display. Therefore, the driving current of OLED is very small. In order to solve this problem, a pixel circuit is proposed in this paper. The pixel circuit consists of 1 PMOS,3 NMOS,1 memory capacitance, 1 OLED and 4 signal lines. The parameters of Pspice based on CSMC 0.6 CMOS5V process are simulated and verified. In this pixel circuit, OLED is in only two states: luminous and non-luminous. When OLED emits light, the current flowing through OLED is constant, and the constant current flowing through is 35.38nA. And the pixel circuit is completely controlled by the digital signal. 2, the time ratio gray level adjustment is realized by using the time ratio gray level method, that is, different gray levels are realized by controlling the luminous time of OLED. The implementation method is as follows: by using the method of molecular field line-by-line scanning, it is divided into six subfields in a frame period, and the time of each subfield is different. There are two kinds of subfields: "open state subfield" and "off state subfield". The former means that OLED can emit light in the subfield, while the latter means that the OLED in the subfield is never luminous. Therefore, by controlling the number of "open state subfield" and "off state subfield" in six subfields, the grayscale from 0 to 63 can be realized. 3. The data processing module system is designed according to the design method of digital integrated circuit. The data processing module is designed by Verilog language. This module can convert the input RGB data into the signal timing needed by the pixel circuit, so that the gray level of the input data is the same as the gray level corresponding to the signal timing. The simulation results of Modelsim show that the module meets the requirements. 4, the layout design follows the MOSIS/ORBIT 2.0U SCNA Design Rules design rules, and the layout of the sub-pixel circuit is designed by using L-edit software. In pixel circuit array, parasitic resistance and parasitic capacitance on scan line and data line will cause RC delay, which will affect the operation of pixel circuit. The worst-case analysis method is used to simulate and verify the sub-pixels of four angles. The results show that the pixel circuit can work normally and the layout design of pixel circuit meets the requirements.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TN873
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