多天线无线通信系统中信号检测关键技术的研究

发布时间：2018-02-25 02:15

本文关键词： MIMO Massive MIMO 信号检测矩阵求逆 FPGA　出处：《电子科技大学》2016年硕士论文　论文类型：学位论文

【摘要】：多天线通信技术可以充分利用空间资源,提高空间自由度,在有效提高系统的信道容量和传输速率的同时,而不引起在系统带宽和信号发送功率上的额外开销。作为典型多天线系统的,传统MIMO的吞吐率已接近其理论上限,大规模MIMO的出现,将进一步挖掘频谱使用效率,提升业务容量,已成为下一代无线通信系统,即5G中极具潜力的一项关键技术,因此,研究多天线通信情况下的信号检测技术具有重要意义。本文主要针对MIMO及Massive MIMO系统中的信号检测技术进行了相关研究。首先对现代无线通信系统的模型以及下一代无线通信中的关键候选技术进行分析与介绍,并对常用的多天线系统的信道模型及其信道容量进行分析,从理论上证明,信道容量会随着天线数的增加而提高。其次介绍了几种常用的检测算法。传统的线性检测算法主要介绍了匹配滤波检测(MF)、迫零检测(ZF)和最小均方误差检测(MMSE)等,以及一种基于纽曼级数展开的近似检测算法,具有较低复杂度的,适用于基站天线数远远大于用户数的情况。非线性检测算法,通常以线性检测结果为基础,主要介绍了串行干扰消除算法(SIC),以及两种基于贪婪思想的局部搜索算法:似然上升搜索(LAS)和动态禁忌搜索(RTS)等,并给出了各个算法的实现步骤。之后,对上述几种算法进行了复杂度分析,并在不同环境下,分别对各种算法进行系统性能仿真,得到其误码率曲线,对其适用性进行讨论分析。仿真结果表明,随着基站天线数与用户天线数之比的增加,线性检测算法与非线性检测算法性能趋于一致,因此在Massive MIMO系统中,接收机采用简单的线性检测即可满足系统要求。线性检测的复杂度与天线数目成指数关系,其中矩阵求逆是最为复杂的部分,已成为制约线性检测技术性能的主要瓶颈。首先就算法的复杂度和适用性,对几种常用的矩阵求逆算法进行了详细分析,最后选取了适用于该系统的,基于改进的cholesky分解的矩阵求逆算法,用于FPGA实现。考虑资源消耗、最大时钟频率、流水、并行和延时等之间的关系,进行矩阵求逆在FPGA上的设计实现,并进行了RTL级仿真及在Xilinx Virtex-7 FPGA上的测试。其中4*4规模矩阵采用全流水结构,延时为66cycle,最大时钟频率可达418MHz,吞吐率104Minv/s;16*16和8*8采用复用结构,最大延时分别为174cycle和490cycle,最大时钟频率均可达500MHz。
[Abstract]:Multi-antenna communication technology can make full use of space resources, improve the degree of freedom of space, and effectively improve the channel capacity and transmission rate of the system. As a typical multi-antenna system, the throughput of traditional MIMO is close to its theoretical upper limit. The emergence of large-scale MIMO will further exploit the spectral efficiency. Enhancing service capacity has become a key technology with great potential in the next generation of wireless communication systems, or 5G, so, It is of great significance to study the signal detection technology in multi-antenna communication. This paper mainly focuses on the signal detection technology in MIMO and Massive MIMO systems. Firstly, the model of modern wireless communication system and the next one are discussed. The key candidate technologies in wireless communication are analyzed and introduced. The channel model and channel capacity of the commonly used multi-antenna system are analyzed, and it is proved theoretically that, The channel capacity will increase with the increase of the number of antennas. Secondly, several commonly used detection algorithms are introduced. The traditional linear detection algorithms mainly introduce matching filter detection, zero forcing detection (ZF) and minimum mean square error detection (MMSE), etc. And an approximate detection algorithm based on Newman series expansion, which has low complexity and is suitable for the case where the number of antennas of base station is far larger than the number of users. The nonlinear detection algorithm is usually based on linear detection results. This paper mainly introduces the serial interference cancellation algorithm (SICI), and two local search algorithms based on greedy thought: likelihood ascending search (LAS) and dynamic Tabu search (RTS), and gives the implementation steps of each algorithm. The complexity of these algorithms is analyzed, and the system performance of these algorithms is simulated in different environments. The BER curve is obtained, and its applicability is analyzed. The simulation results show that, With the increase of the ratio of the number of base station antennas to the number of user antennas, the performance of linear detection algorithm and nonlinear detection algorithm tends to be consistent, so in Massive MIMO system, The receiver adopts simple linear detection to satisfy the system requirements. The complexity of linear detection is exponentially related to the number of antennas, and matrix inversion is the most complex part. It has become the main bottleneck that restricts the performance of linear detection technology. Firstly, several commonly used matrix inverse algorithms are analyzed in detail on the complexity and applicability of the algorithm. The matrix inverse algorithm based on improved cholesky factorization is used in FPGA implementation. Considering the relationship between resource consumption, maximum clock frequency, income, parallelism and delay, the inverse matrix is designed and implemented on FPGA. The RTL level simulation and the test on Xilinx Virtex-7 FPGA are carried out. Among them, the 4Q4 scale matrix adopts the full income structure, the delay is 66cycle. the maximum clock frequency can reach 418MHz, the throughput of 104Minvsr / s 16 / 16 and 8Y8 are multiplexed. The maximum delay is 174cycle and 490cycle.The maximum clock frequency can reach 500MHz.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN919.3;TN911.23

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