心电信号处理模块设计

发布时间：2018-02-27 11:06

本文关键词： 心电信号处理小波变换支持向量机低功耗可配置硬件　出处：《中国地质大学(北京)》2017年硕士论文　论文类型：学位论文

【摘要】：近年来,随着经济社会的飞速发展,人们的健康意识逐步增强,对自身健康状态的及时监测有了更高的要求。便携式家用可穿戴健康监测设备的应用市场应运而生。而对人体的多种生理参数的健康监测中,动态心电信号的实时监测是不可或缺的一部分。然而长时间的心电信号监测势必产生大量的数据。一方面大量原始心电数据通过无线上传到终端会占用大量的功耗;另一方面仅依靠医生手工在大量心电信号数据中逐帧分析心拍类型,极易疲劳并产生对心脏疾病的漏检错检。因此开发出一款低功耗心电信号智能处理模块,应用于健康级便携式可穿戴心电信号智能感知节点。实现片上实时监测动态心电信号并自动分析心拍类型,为医生提供简洁准确地人体心电信息,对高效便捷的实现人体健康状态的动态监测具有重要的意义。心电信号处理算法包括消噪滤波、心拍R峰检测、心拍特征参数压缩提取、心拍分类识别四部分。消噪算法使用小波变换阈值收缩法滤除肌电干扰、基线漂移、电极扰动和工频干扰等噪声。算法在滤除噪声的同时能较好的保留心电信号波形特征。心拍R峰检测部分,通过搜索双正交二次样条小波三四尺度上的极值对过零点确定R峰位置,接着根据R峰的位置截取出样本心拍,并提取高阶累积量特征。分类识别部分,将提取出的心拍特征向量,用二分类支持向量机两两组合的形式,通过投票得出多分类结果。算法硬件实现部分综合考虑灵活可配置、低功耗、节省面积和高效计算多方面因素。本设计的硬件模块包括可配置小波变换算子和多分类支持向量机决策算子。本设计硬件结构的低功耗优化设计主要体现在算法级和硬件结构级,包括减少冗余计算、减少共享存储器读写次数、合理设置子模块时钟门控等。节省面积方面,通过合理复用基本功能模块以及合理安排中间数据存储空间来精简结构。另外,通过合理设计状态机的控制逻辑实现硬件模块的灵活可配置以支持多功能计算,同时还具备专用集成电路(ASIC)的功耗、面积和速度优势。本文所设计心电信号处理硬件模块在SMIC (中芯国际)的0.13μm工艺条件下完成超大规模集成电路(VLSI)设计,功耗27.8μW,面积2.43mm~2。
[Abstract]:In recent years, with the rapid development of economy and society, people's awareness of health has gradually increased. The application market of portable household wearable health monitoring equipment emerges as the times require. In the health monitoring of various physiological parameters of human body, the market of portable household wearable health monitoring equipment emerges as the times require. The real-time monitoring of dynamic ECG signals is an indispensable part. However, a long period of ECG monitoring will produce a lot of data. On the one hand, a large amount of raw ECG data will consume a lot of power by wireless uploading to the terminal. On the other hand, only relying on doctors to manually analyze the beat type in a large number of ECG data frame by frame, it is easy to fatigue and cause the missed detection of heart disease. Therefore, a low-power ECG intelligent processing module has been developed. It is applied to the portable wearable ECG intelligent sensing node of health grade. It realizes the real-time monitoring of dynamic ECG signal on the chip and automatically analyzes the type of cardiac beat, which provides the doctor with concise and accurate human ECG information. The ECG signal processing algorithms include de-noising filtering, R peak detection, characteristic parameter compression and extraction. The denoising algorithm uses wavelet transform threshold contraction method to filter EMG interference and baseline drift. Noise such as electrode disturbance and power frequency interference. The algorithm can preserve the waveform characteristics of ECG signal while filtering noise. The location of the R peak is determined by searching the extremum pairs of the biorthogonal quadratic spline wavelet at three and four scales. Then the sample beat is intercepted according to the position of the R-peak, and the feature of high-order cumulant is extracted. In this paper, the extracted beat feature vectors are extracted, and the multi-classification results are obtained by voting in the form of two-class support vector machines. The hardware implementation of the algorithm is flexible, configurable and low power consumption. The hardware modules of this design include configurable wavelet transform operator and multi-classification support vector machine decision operator. The low power optimization design of the hardware structure of this design is mainly reflected in the algorithm. Level and hardware structure level, Including reducing redundant computing, reducing the number of shared memory reading and writing, setting up sub-module clock gating, etc. In the aspect of saving area, the structure can be reduced by reasonable reuse of basic functional modules and reasonable arrangement of intermediate data storage space. By reasonably designing the control logic of the state machine, the hardware module can be configured flexibly to support multi-function calculation, and the power consumption of ASIC-ASIC can be obtained. Area and speed advantage. The designed ECG signal processing hardware module is designed under the condition of SMIC (SMIC) 0.13 渭 m technology. The power consumption is 27.8 渭 W and the area is 2.43mm / 2.
【学位授予单位】：中国地质大学(北京)
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：R540.4;TN911.7

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