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高速卫星通信调制解调器的设计与实现

发布时间:2018-05-06 23:06

  本文选题:高速调制解调 + APSK ; 参考:《哈尔滨工业大学》2017年硕士论文


【摘要】:随着卫星通信技术的不断进步,为了满足卫星通信中日益增长的数据传输需求,高速调制解调技术在军事民用领域都具有很高的价值。本文对适用于卫星通信的16APSK调制解调器设计与实现进行深入研究,主要研究内容集中在高阶调制方式研究、高速并行架构设计、16APSK调制器的设计、16APSK解调器的设计几个方面。首先介绍了高速调制解调器的研究意义,国内外对卫星通信调制解调器的研究现状及发展趋势。随后研究了卫星通信中非线性信道特点,结合误码性能及实现复杂度,选择16APSK作为本文卫星通信中的通信体制。比较了三种已有的高速并行处理架构的优缺点,重点分析了调制解调器的理论基础,包括调制器和解调器的基本原理、数学模型及结构,并研究了调制解调器中成型匹配滤波、载波恢复、位同步及频率合成技术等关键技术。其次,对16APSK的星座图进行了优化设计,将4+12-ASPK星座图中内外圆的半径比选取为2.7,使其具有最佳的抗干扰性能。为了降低数据处理速率,以APRX结构为基础设计了调制解调器的全并行结构。重点研究了全并行高速调制解调技术,在调制器部分,主要研究了多相结构的并行成型滤波和采用了并行NCO的上变频技术。在解调器部分,研究了时域并行和频域并行两种匹配滤波结构,并对比了两者计算复杂度;比较了超前滞后门法、Gardner算法,研究了Gardner位同步环路,设计了并行位同步方案;研究了DD、极性判决等载波恢复算法,提出了一种改进的联合载波恢复技术,环路具有更大的载波频偏捕获范围和更稳定的跟踪性能,并设计了并行载波恢复方案;研究了串并转换时的偏移调整技术,设计了并行结构的高速数据接口。最后,在Xilinx平台上对信息速率为100Mbps的高速16APSK调制解调器进行设计与实现。详细阐述了16APSK高速调制器和解调器中主要功能模块的设计方法和调试结果,包括调制器中的多相结构并行成型滤波模块和并行NCO上变频模块,解调器中的时域并行匹配滤波模块、并行Gardner位同步模块、并行载波恢复模块等,并对各功能模块工作的正确性进行了验证。
[Abstract]:With the development of satellite communication technology, in order to meet the increasing demand of data transmission in satellite communication, high-speed modulation and demodulation technology is of great value in military and civilian fields. In this paper, the design and implementation of 16APSK modem suitable for satellite communication are deeply studied. The research focuses on the high order modulation mode and the design of the high speed parallel architecture modulator / 16APSK demodulator. Firstly, the research significance of high-speed modem, the research status and development trend of satellite communication modem at home and abroad are introduced. Then, the characteristics of nonlinear channel in satellite communication are studied. Combined with the error performance and complexity, 16APSK is chosen as the communication scheme in this paper. The advantages and disadvantages of three existing high-speed parallel processing architectures are compared, and the theoretical basis of modem is analyzed, including the basic principle of modulator and demodulator, mathematical model and structure, and the shaping matched filter in modem is studied. Carrier recovery, bit synchronization and frequency synthesis technology and other key technologies. Secondly, the 16APSK constellation diagram is optimized, and the radius ratio of the inner and outer circle in the 4 12-ASPK constellation diagram is chosen to be 2.7, which makes it have the best anti-interference performance. In order to reduce the data processing rate, the full parallel structure of modem is designed based on APRX architecture. The full parallel high speed modulation and demodulation technology is mainly studied. In the modulator part, the parallel shaping filter with polyphase structure and the up-conversion technology using parallel NCO are mainly studied. In the part of demodulator, two kinds of parallel filtering structures in time domain and frequency domain are studied, and the computational complexity of them is compared, and the Gardner bit synchronization loop is studied, and the parallel bit synchronization scheme is designed. In this paper, the DDD, polarity decision and other carrier recovery algorithms are studied, and an improved joint carrier recovery technique is proposed. The loop has a larger carrier offset acquisition range and a more stable tracking performance, and a parallel carrier recovery scheme is designed. The offset adjustment technique in serial-parallel conversion is studied, and a high speed data interface with parallel structure is designed. Finally, a high speed 16APSK modem with 100Mbps information rate is designed and implemented on Xilinx platform. The design method and debugging results of the main function modules in the 16APSK high speed modulator and demodulator are described in detail, including the multiphase structure parallel shaping filter module and the parallel NCO up-conversion module. The time domain parallel matched filter module, parallel Gardner bit synchronization module, parallel carrier recovery module and so on are included in the demodulator. The correctness of each functional module is verified.
【学位授予单位】:哈尔滨工业大学
【学位级别】:硕士
【学位授予年份】:2017
【分类号】:TN927.2;TN915.05

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