超声探测器多通道数据获取系统的设计
发布时间：2018-12-15 03:42
【摘要】：超声诊断是一项重要的医学诊断技术,由于它具有无痛、无创、操作方便、显示直观、成本低廉等特点,在医学诊断领域得到了广泛的应用。就超声诊断技术而言,超声波的频率越高,图像分辨率就越高,显示的结构也越精细。传统的超声探测器探测的超声波频率较低,导致图像分辨率低,成像精度差,制约了超声诊断技术的发展。因此,探索高分辨率超声探测器成为近年来研究热点。PVDF压电膜具有压电效应,当接收到超声信号时会有感应电荷产生。本实验室自主研发的Topmetal像素传感器芯片具有体积小、位置分辨率高、响应速度快等优势,并且可以用来收集电荷,产生模拟电信号输出。因此,利用PVDF压电膜和Topmetal像素传感器可以设计出满足需求的高分辨率超声探测器。本文的研究重点就是为此超声探测器设计多通道数据获取系统。该数据获取系统通过8通道、12位高速模数转换器对像素传感器模拟输出进行采样,采样率为25MSPS。ADC采样的数据以LVDS形式传送到FPGA后,经过差分到单端的转换、延时调整、串并转换、FIFO缓存后写入128MByte的SDRAM中,然后通过PCIe总线将数据传送到PC端保存并分析。PC端的控制指令通过PCIe总线传送到FPGA中。本文的主要研究工作：1、硬件电路设计：包括芯片bonding板、芯片驱动板、ADC采样板的硬件电路设计。bonding板实现芯片pad的引出。驱动板提供芯片控制信号、外部复位电平和模拟输出驱动。ADC采样板用来对像素传感器的模拟输出进行采样。2、系统逻辑设计：包括时钟管理模块、ADC寄存器配置模块、差分转换模块、延时控制模块、串并转换模块、数据缓存模块以及QSYS系统设计。3、系统软件设计：利用Linux操作系统下PCIe驱动用户接口函数实现了ADC寄存器设置、数据延时设置、延时分析和传输误码分析等功能。4、系统测试：包括硬件电子学各模块测试和整个超声探测系统的测试。测试结果表明,数据获取系统可稳定工作在25MSPS采样率下。
[Abstract]:Ultrasonic diagnosis is an important medical diagnosis technology. Because of its painless, non-invasive, convenient operation, visual display, low cost and so on, it has been widely used in the field of medical diagnosis. As far as ultrasonic diagnosis technology is concerned, the higher the ultrasonic frequency, the higher the image resolution and the finer the display structure. The low ultrasonic frequency detected by traditional ultrasonic detectors leads to low image resolution and poor imaging accuracy, which restricts the development of ultrasonic diagnosis technology. Therefore, the exploration of high resolution ultrasonic detectors has become a hot topic in recent years. PVDF piezoelectric film has piezoelectric effect and inductive charge will be generated when the ultrasonic signal is received. The Topmetal pixel sensor chip developed by our laboratory has the advantages of small size, high position resolution, fast response speed, and can be used to collect charge and generate analog electrical signal output. Therefore, high resolution ultrasonic detector can be designed by using PVDF piezoelectric film and Topmetal pixel sensor. The key point of this paper is to design a multi-channel data acquisition system for ultrasonic detector. The data acquisition system samples the analog output of pixel sensor through 8 channels and 12 bits high speed A / D converter. After the data sampled by 25MSPS.ADC is transmitted to FPGA in the form of LVDS, after the difference to single terminal conversion, the delay is adjusted. Series-parallel conversion, FIFO cache, then write to 128MByte SDRAM, and then transfer data to PC through PCIe bus to save and analyze. PC control instructions are sent to FPGA via PCIe bus. The main research work of this paper is as follows: 1. Hardware circuit design: including the hardware circuit design of chip bonding board, chip driver board and ADC sampling board. Bonding board realizes the extraction of chip pad. The driver board provides chip control signal, external reset level and analog output driver. ADC sampling board is used to sample the analog output of pixel sensor. 2. System logic design: including clock management module, ADC register configuration module, Differential conversion module, delay control module, series-parallel conversion module, data cache module and QSYS system design. 3. System software design: using PCIe driver user interface function under Linux operating system to realize ADC register setting. Data delay setting, delay analysis, transmission error analysis and other functions. 4, system testing: including hardware and electronics modules test and the whole ultrasonic detection system testing. The test results show that the data acquisition system can work stably under the 25MSPS sampling rate.
【学位授予单位】：华中师范大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TH776
本文编号：2379902
[Abstract]:Ultrasonic diagnosis is an important medical diagnosis technology. Because of its painless, non-invasive, convenient operation, visual display, low cost and so on, it has been widely used in the field of medical diagnosis. As far as ultrasonic diagnosis technology is concerned, the higher the ultrasonic frequency, the higher the image resolution and the finer the display structure. The low ultrasonic frequency detected by traditional ultrasonic detectors leads to low image resolution and poor imaging accuracy, which restricts the development of ultrasonic diagnosis technology. Therefore, the exploration of high resolution ultrasonic detectors has become a hot topic in recent years. PVDF piezoelectric film has piezoelectric effect and inductive charge will be generated when the ultrasonic signal is received. The Topmetal pixel sensor chip developed by our laboratory has the advantages of small size, high position resolution, fast response speed, and can be used to collect charge and generate analog electrical signal output. Therefore, high resolution ultrasonic detector can be designed by using PVDF piezoelectric film and Topmetal pixel sensor. The key point of this paper is to design a multi-channel data acquisition system for ultrasonic detector. The data acquisition system samples the analog output of pixel sensor through 8 channels and 12 bits high speed A / D converter. After the data sampled by 25MSPS.ADC is transmitted to FPGA in the form of LVDS, after the difference to single terminal conversion, the delay is adjusted. Series-parallel conversion, FIFO cache, then write to 128MByte SDRAM, and then transfer data to PC through PCIe bus to save and analyze. PC control instructions are sent to FPGA via PCIe bus. The main research work of this paper is as follows: 1. Hardware circuit design: including the hardware circuit design of chip bonding board, chip driver board and ADC sampling board. Bonding board realizes the extraction of chip pad. The driver board provides chip control signal, external reset level and analog output driver. ADC sampling board is used to sample the analog output of pixel sensor. 2. System logic design: including clock management module, ADC register configuration module, Differential conversion module, delay control module, series-parallel conversion module, data cache module and QSYS system design. 3. System software design: using PCIe driver user interface function under Linux operating system to realize ADC register setting. Data delay setting, delay analysis, transmission error analysis and other functions. 4, system testing: including hardware and electronics modules test and the whole ultrasonic detection system testing. The test results show that the data acquisition system can work stably under the 25MSPS sampling rate.
【学位授予单位】：华中师范大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TH776
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1 刘军;超声探测器多通道数据获取系统的设计[D];华中师范大学;2015年
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