铪基栅介质薄膜的PEALD制备及界面调控研究
发布时间:2018-01-18 12:22
本文关键词:铪基栅介质薄膜的PEALD制备及界面调控研究 出处:《北京有色金属研究总院》2017年博士论文 论文类型:学位论文
更多相关文章: 铪基高k栅介质 PEALD 掺杂 等离子体处理 Si SiGe ETSOI MOSFET
【摘要】:随着CMOS集成电路的快速发展,集成电路的基本单元MOSFET器件的几何尺寸不断缩小。在这种条件下,器件的栅介质性能、沟道迁移率以及短沟道控制力、可靠性等方面随之遇到严峻挑战。特别是进入16纳米及以下节点以后,CMOS器件需要有更高介电常数的栅介质薄膜、高迁移率的沟道材料以及新型器件结构。因此本文以铪基氧化物栅介质材料为研究对象,探索了 PEALD制备工艺和不同元素掺杂对铪基薄膜高k栅介质材料性能的影响,并考察铪基高k栅介质在ETSOI MOSFET器件中应用的可行性。具体研究内容如下:(1)研究了 PEALD制备工艺对HfO_2薄膜的材料性能影响。实验表明,以O_2等离子·体为氧前驱体条件下,Ar作为载气较N_2作为载气所制备的HfO_2薄膜质量更优。其主要原因是N_2载气在等离子条件下参与HfO_2薄膜的沉积反应并以Hf-N-O和Hf-N化学键形式存在,造成HfO_2薄膜的固定缺陷密度增大以电学性能衰退;此外实验在Ar载气条件下,分别以O_2等离子体、H2O和O3作为氧前驱体制备HfO_2薄膜,研究发现相同物理厚度下的薄膜,其饱和电容密度相当。O3等离子体制备的HfO_2薄膜具有最小固定缺陷浓度。(2)研究了Ti、Zr、Gd掺杂对铪基薄膜化学组分及电学性能的影响。结果显示,Ti、Zr、Gd掺杂均能显著增加HfO_2薄膜的介电常数,分别能够达到39、20.4和22.4。其中,Ti掺杂对介电常数的影响最大。尽管Zr的掺杂降低了铪基薄膜与Si衬底的导带偏移量,但是Zr含量为10at%的ZrO_2-HfO_2(ZHO)非晶薄膜具有良好的电学特性。Gd掺杂有效地抑制了 Gd2O3-HfO_2(GHO)/Si界面层的生成,使得薄膜的固定缺陷密度和漏电流密度有显著下降。(3)采用PEALD等离子体方法处理HfO_2/SiO_2界面和HfO_2/SiGe界面,研究了等离子体对界面的钝化作用。研究发现N_2等离子体处理HfO_2/SiO_2界面后,N原子占据氧空位和O原子间隙,减少SiO_2界面层的氧空位并对钝化O原子,同时N原子在SiO_2表面形成Si-N键抑制HfO_2与SiO_2原子相互扩散,有效降低HfO_2薄膜O原子的缺失,堆栈结构的固定缺陷浓度从3.2×1012cm~(-2)下降到2.5×1012cm~(-2),从而漏电流密度从1.1×10-3A/cm~2下降到3.2×10-6A/cm~2,饱和电容密度从1.36μF/cm~2提高到1.49μF/cm~2,并且保持良好的电学性能稳定性;在HfO_2薄膜沉积之前,以N_2/H2等离子体处理SiGe表面后,N原子以Ge-N和Si-N键的形式存在,减少了 SiGe界面氧化物和固定缺陷浓度,漏电流密度从2.4×10-4A/cm~2 下降到 4.6×10-6A/cm~2,饱和电容密度从 1.53μF/cm~2 增大到 1.73μF/cm~2,相应的EOT从1.82nm下降到1.64nm,并且0.3MHz到1MHz的C-V曲线频散从9.7%下降到8.7%,降低了 HfO_2/SiGe的界面态密度。(4)采用PEALD制备工艺在SiGe/Si衬底上沉积GHO薄膜,研究N_2等离子体逐层退火GHO薄膜对GHO/SiGe堆栈结构化学组分和电学性能的影响。研究发现Gd掺杂可以抑制铪基薄膜氧空位的生成,减少GHO/SiGe界面氧化物的生成,使铪基薄膜的组分更符合化学计量比,提高了薄膜的饱和电容密度,降低了漏电流密度;研究发现通过N_2等离子体逐层对GHO薄膜进行原位退火,N原子占据GHO薄膜的氧空位位置,降低了 GHO薄膜的固定缺陷密度,同时N原子以Ge-N和Si-N形式钝化界面,减少了界面氧化物的生成和界面态密度,薄膜的漏电流密度从1.9×10-5A/cm~2下降到2×108A/cm~2。(5)将TiO_2-HfO_2(THO)高k栅介质体系应用于16/14nm ETSOI CMOS工艺器件,探索了 THO高k薄膜在小尺寸(Lg=25nm)新型结构器件的可行性。研究发现,以THO作为栅介质薄膜的ETSOI MOSFET比以HfO_2作为栅介质薄膜的ETSOIMOSFET具有更优异的开关性能、短沟道控制能力和沟道迁移率。其中以THO为栅介质薄膜的ETSOIpMOSFET器件主要性能有,开态电流密度为4.63×1O-4A/μm,关态电流密度为1.5×10-8A/μm,开关比为3.1×104,跨导值为2.67mA/V,DIBL 为 53mV/V,SS 为 65mV/dec,器件空穴迁移率为28cm~2V-1s-1;通过THO代替HfO_2作为栅介质薄膜,可以提高器件整体性能,满足器件进一步缩小的需求。
[Abstract]:With the rapid development of integrated circuit CMOS, geometry MOSFET basic unit of integrated circuit devices shrinking. In this condition, the gate dielectric properties of the device, channel mobility and short channel control, then the reliability challenges encountered and so on. Especially after entering the 16 nm node and below, need CMOS devices a gate dielectric film with higher dielectric constant, high mobility channel materials and new device structure. Therefore, hafnium based oxide gate dielectric material as the research object, to explore the preparation process of PEALD and doping different elements influence on the performance of HF based thin films with high k dielectric materials, and investigate the feasibility of the application high k gate dielectric in ETSOI MOSFET devices. The specific contents are as follows: (1) study the effects of preparation process of PEALD on properties of HfO_2 films. Experimental results show that the O_2 plasma and body for oxygen The body under the condition of Ar as the carrier gas is N_2 as the carrier gas HfO_2 film preparation quality is better. The main reason is the deposition of HfO_2 films on N_2 carrier gas in plasma under the condition of Hf-N-O and Hf-N and existed in the form of chemical bond, fixed defect density of HfO_2 films increases to cause electrical performance decline; in addition, the carrier gas under the condition of Ar, H2O and O_2 respectively in plasma, O3 as oxygen precursor for the preparation of HfO_2 thin film thickness under the same physical findings, HfO_2 thin film and its saturation density of capacitance is the equivalent of.O3 plasma prepared with the minimum fixed defect concentration. (2) of Ti, Zr, Gd doping and electrical properties of hafnium based film chemical group. The results showed that Ti, Zr, Gd doping can significantly increase the dielectric constant of HfO_2 thin films can reach 39,20.4 and 22.4. respectively, the Ti doping on the dielectric constant of the greatest influence. Although Zr Doping reduces the conduction band offset hafnium based film and Si substrate, but the content of Zr is 10at% ZrO_2-HfO_2 (ZHO) doped amorphous thin film with good electrical properties of.Gd effectively inhibited the formation of /Si Gd2O3-HfO_2 (GHO) interface layer, the fixed defect density of thin films and the leakage current density decreased significantly (3.) using PEALD plasma method of HfO_2/SiO_2 interface and HfO_2/SiGe interface, the passivation effect of plasma on the interface. The study found that N_2 plasma treatment, HfO_2/SiO_2 interface, N atoms and O atoms occupy the oxygen vacancy gap, reducing the oxygen vacancy less SiO_2 interface layer and the passivation of O and N atoms, atomic Si-N bond formation inhibition of HfO_2 and SiO_2 the diffusion of atoms on the surface of SiO_2, reduce the loss of HfO_2 thin film of O atoms, the stack structure of fixed defect concentration from 3.2 * 1012cm~ (-2) decreased to 2.5 * 1012cm~ (-2), and leakage current The density decreased from 1.1 * 10-3A/cm~2 to 3.2 * 10-6A/cm~2, saturation capacitance density increased from 1.36 F/cm~2 to 1.49 F/cm~2, and keep the electrical properties good stability; before HfO_2 film deposition, plasma surface treatment SiGe N_2/H2, N atoms to form Ge-N and Si-N bonds, reduced SiGe oxide and interface the fixed defect concentration, the leakage current density decreased from 2.4 * 10-4A/cm~2 to 4.6 * 10-6A/cm~2, saturation capacitance density increases from 1.53 F/cm~2 to 1.73 F/cm~2, the corresponding EOT decreased from 1.82nm to 1.64nm, 0.3MHz and C-V to 1MHz frequency dispersion curve decreased from 9.7% to 8.7%, reducing the interface state density (4 HfO_2/SiGe.) GHO films deposited on SiGe/Si substrates by using PEALD technology, the research of N_2 plasma by annealing GHO films on the GHO/SiGe layer stack structure chemical composition and electrical properties of the study found that Gd doping can. Hafnium based film formation inhibition of oxygen vacancy, reduce the generation of GHO/SiGe interface oxide, the HF based film composition more stoichiometric film improved saturation capacitance density, reducing the leakage current density; through the study found that N_2 plasma layer of GHO thin films by in situ annealing, oxygen vacancy N atoms occupy GHO the film, reducing the fixed defect density of GHO films, while N atoms with Ge-N and Si-N form passivation interface, reduce the interface oxide formation and interface state density, thin film leakage current density from 1.9 down to 2 * 108A/cm~2. * 10-5A/cm~2 (5) TiO_2-HfO_2 (THO) high k gate dielectric system applied to 16/14nm ETSOI CMOS process device, explored the THO high K films in small size (Lg=25nm) the feasibility of new structure devices. The study found that with THO as the gate dielectric thin films ETSOI MOSFET than with HfO_2 as the gate dielectric thin films ET SOIMOSFET has more excellent switching performance, short channel control and channel mobility. With THO as the gate dielectric films ETSOIpMOSFET device performance, on state current density of 4.63 x 1O-4A/ m, off state current density of 1.5 x 10-8A/ m, switch ratio is 3.1 * 104, cross guide a value of 2.67mA/V, DIBL 53mV/V, SS 65mV/dec, device hole mobility is 28cm~2V-1s-1; by using THO instead of HfO_2 as the gate dielectric film, can improve the overall performance of the device, the device to meet the demand. Further reduced
【学位授予单位】:北京有色金属研究总院
【学位级别】:博士
【学位授予年份】:2017
【分类号】:TN386;TB383.2
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