基于MPSoC的移动视频监控关键技术研究

发布时间：2018-03-02 01:19

本文关键词： 移动视频监控解块滤波运动检测压缩域视频处理多核处理器　出处：《东南大学》2016年博士论文　论文类型：学位论文

【摘要】：随着移动通信技术的不断发展,移动高清视频监控由于具有安装方便、灵活性强、性价比高等特点,己成为视频监控系统的重要组成部分。视频监控高清化的发展对移动高清视频监控的基础、移动通信网络技术(特别是上行带宽)的发展等带来一定压力和挑战；解块滤波和运动检测可以一定程度上缓解以上挑战,同时基于压缩域的实现还可以降低监控视频高物理分辨率(4K：4690×2304)导致的MPSoC器件结构设计的难度。论文基于多核系统芯片(MPSoC)开展了数据量大且复杂度高的解块滤波和运动检测模块的相关研究,以及对应压缩域解块滤波专用指令集处理器(ASIP)的研究,主要工作及创新如下：●提出了一种基于滞后连接边缘图提取方法和块状瑕疵程度评判的自适应复合压缩域解块滤波算法(LCJDD),同时针对移动监控设计了嵌入式改进型LCJDD算法：通过基于滞后连接的压缩域边缘图提取以区分边缘与非边缘区域,再在非边缘区域中分析临近压缩数据块和半块尺寸平移图像数据块的DCT变换系数,得到块状瑕疵程度分类,最后根据瑕疵区域的分类进行自适应滤波。仿真结果表明,本文方法在低比特率和高比特率压缩的场景下都稳定工作(bpp=0.28-1.2),人为瑕疵情况明显改善,重构图像质量提高1%～3%。同时嵌入式改进型LCJDD算法相较于前人经典方法,在实际高清移动监控处理场景下,执行时间分别为前人经典方法的1/2～1/3和1/4左右。在基于类TI DSP(8路指令并发槽)的超长指令集(VLIW)构架(Cadence Lx6基本型,600MHz)下的实验结果表明：嵌入式改进型LCJDD在3路指令并发槽条件下能达到130帧／每秒(1024×768,QP为1O)。● 提出了一种基于运动边缘图和弱运动区域滞后连接的运动检测算法(ECLC)并完成了压缩域实现：基于边缘梯度信息揭示了像素之间的空间相关性,通过基于边缘图帧差的运动检测确认运动程度高的核心前景区域,通过指数单调衰减背景模型判定潜在运动区域,根据潜在运动区域和核心前景区域互联辨识确认运动前景的完整目标区域。仿真结果表明：本文ECLC分析结果中噪声多、易受较快光变干扰、目标检测精度低的问题明显改善,官方标准测试视频所测结果中提取完整性指标均高于90%,基本优于和等同混合高斯(GMM)和ViBe中较好的结果,误检率指标在三种方法前景完整性基本相似的情况下,下降接近50%以上。● 基于Cadence Lx6(VLIW可定制ASIP框架)完成了嵌入式改进型LCJDD对应的低构架资源消耗和高吞吐量的ASIP模块设计：通过设计基于多面体有限可剖分调度方法挖掘了LCJDD算法的最大并发度(TPL/IPL),然后基于时间使能同步数据流和并发调度实现了对应实现的构架资源(并发指令槽数和指令寄存器数量)合理范围预测。嵌入式改进型LCJDD的MPSoC内嵌ASIP模块具有较高的数据吞吐量和较低内存访问量和构架资源消耗：ASIP工作频率为28MHz时,在构架最大容许定制指令(ASI)并发槽数为5的约束下,使用3个ASI并发指令槽即可实现4K格式视频(16：9—4690×2304@30帧)的压缩域解块滤波处理,相较于近期文献中超高吞吐量的像素域解块滤波设计(同65nm工艺情况下)在相同数据和控制依赖条件下,最大并行度提高20%,最大数据吞吐量提高2倍,数据承载／内存访问量仅需像素域解块滤波的1/8,临时数据片上占用空间仅为2/5。在28nm和65nm工艺环境下,该ASIP模块实现的最大工作频率分别为940MHz和597MHz。
[Abstract]:With the development of mobile communication technology, mobile HD video monitoring because of its convenient installation, high flexibility, high price, has become an important part of the video monitoring system. The development of video surveillance based on high-definition video mobile HD monitoring, mobile communication network technology (especially the uplink bandwidth) to bring some pressure and challenges the development of; deblocking filter and motion detection can alleviate the above challenges to a certain extent, also realized based on compressed domain can also reduce the high resolution video monitoring physical (4K:4690 * 2304) MPSoC device structure design leads to the difficulty of the thesis. Based on multi-core system on chip (MPSoC) carried out a large amount of data and high complexity. The solution of detection module block filtering and motion related research, and the corresponding compression domain deblocking filter application specific instruction set processor (ASIP) research, the main work and innovation As follows: - a delay connecting edge graph extraction method and block defect degree evaluation of complex adaptive deblocking filter algorithm based on compressed domain (LCJDD), at the same time for the design of embedded mobile monitoring improved LCJDD algorithm by lag to distinguish between the edge and non edge region connecting the compressed domain edge map extraction based on analysis near the compressed data block and a half block size shift image data block DCT transform coefficients in non edge region, get the massive defect degree classification, finally the adaptive filter according to the classification of defect area. The simulation results show that this method of scene rate compression at low bit rate and high bit under steady working conditions of the human (bpp=0.28-1.2). Defect significantly improved the quality of the reconstructed image is improved 1% ~ 3%. embedded and improved LCJDD algorithm compared to the previous classical method, mobile monitoring in the actual high Qing Control scenarios, execution time respectively. Previous classical methods of 1/2 ~ 1/3 and 1/4 respectively. Based on the TI DSP (8 instructions and slots) the VLIW ARCHITECTURE (Cadence (VLIW) Lx6 basic type, 600MHz) the experimental results show that the improved embedded can reach up to 130 frames per second LCJDD in the 3 Slot under instructions concurrent (1024 x 768 QP, 1O). It presents a backward motion detection algorithm and the weak connection of moving edge map based motion region (ECLC) and complete domain compression: edge gradient information reveals the spatial correlation between pixels based on the edge map frame differential motion detection confirmed the prospect of regional sports core high degree based on the monotone attenuation index through the background model determine the potential motion area, according to the potential motion area and core area interconnected prospect identification confirmed the entire area of target moving foreground. Simulation results. The results show that the ECLC noise analysis results, susceptible to rapid light interference, low detection accuracy target is obviously improved, the official video standard test results measured by the extraction of integrity index was higher than 90%, and better than the basic equivalent mixed Gauss (GMM) and good results in ViBe, the error detection rate index in the three method is similar to the prospect of integrity, decreased to more than 50%. Based on the Cadence - Lx6 (VLIW ASIP framework can be customized) ASIP module to complete the design of embedded LCJDD improved corresponding frame low resource consumption and high throughput: Based on finite polyhedron dissectable scheduling method mining LCJDD algorithm the maximum concurrent degree (TPL/IPL), and then based on the time synchronous data flow and can realize concurrent scheduling framework to achieve the corresponding resources (number of concurrent instruction slots and instruction register) reasonable range prediction block. The data throughput of MPSoC embedded ASIP module into improved LCJDD with high and low memory access and frame of resource consumption: ASIP working frequency is 28MHz, the maximum allowable custom instructions in architecture (ASI) with slot number is 5 under the constraint of using 3 ASI concurrent instruction slots can be realized 4K video format (16:9 - 4690 x 2304@30 frames) compressed domain deblocking filtering, pixel domain compared to the recent literature in high throughput deblocking filter design (with 65nm under the condition of the technology depends on the conditions in the same data) and under the control of the maximum degree of parallelism is increased by 20%, the maximum data throughput increased by 2 times, the data carrying / memory access volume only the pixel domain deblocking filter 1/8, on-chip temporary data space is only 2/5. in the 28nm and 65nm technology environment, the maximum working frequency of the ASIP module are respectively 940MHz and 597MHz.

【学位授予单位】：东南大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TN948.6

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