非晶铟镓锌氧薄膜晶体管的器件物理研究

发布时间：2018-03-24 02:00

本文选题：非晶铟镓锌氧　切入点：薄膜晶体管　出处：《南京大学》2016年博士论文

【摘要】：当前,以非晶铟镓锌氧薄膜晶体管(a-IGZO TFT)为代表的非晶氧化物半导体TFT受到了国内外研究者的广泛关注。a-IGZO TFT与传统硅基TFT相比,同时具有迁移率高、关态漏电流低、均匀性好、制造成本低等卓越特性,在新型显示技术领域极具应用前景。但是,由于a-IGZO的非晶属性,导致a-IGZO TFT仍存在许多科学问题,限制了其在显示产业中的应用。较为突出的问题包括器件微缩化中的接触电阻问题及器件在偏压和光照下长时间工作时的可靠性问题等。为了解决这些问题,首先需要对相关的器件物理进行深入的理解。本论文针对a-IGZO TFT的科学问题,综合运用多种表征方法对器件的接触特性和界面特性进行了表征,研究了影响器件特性的物理因素。本文主要研究内容及结果如下：1.采用直流磁控溅射技术制备了反交叠公共背栅型a-IGZO TFT,通过优化工艺参数,成功制备出具有良好电学性能的器件。通过改变退火温度,制备了系列具有比较意义的样品,供器件物理分析使用。为了有效地研究a-IGZOTFT接触特性和界面特性的器件物理,首先需要准确地提取器件的阈值电压、有效迁移率等电学参数,为此讨论和分析了常用的晶体管电学参数提取方法对a-IGZO TFT的适用性。进而提出了一种考虑a-IGZO迁移率与栅极电压非线性依赖关系的电学参数提取方法,通过对a-IGZO TFT的转移特性进行拟合,准确地提取了不同退火温度的a-IGZO TFT的闽值电压、迁移率等电学参数,并分析了退火温度影响这些电学参数的物理本质。2.为了研究a-IGZO TFT的源漏接触特性,首先需要准确地提取器件的接触电阻阻值。通过优化沟道电阻法,使之适应于a-IGZO TFT接触电阻随栅极电压变化的特性,提取了工作在线性区的器件在不同栅极电压下的接触电阻值和传输长度值。进而研究了器件的接触电阻和传输长度与栅极电压的依赖关系,发现器件的接触电阻和传输长度均随栅极电压的增大而减小。由于接触电阻与沟道电阻符合相同的栅极电压依赖关系,说明源漏电极下方区域内的a-IGZO薄膜的电阻是构成总接触电阻的重要部分。继而运用电阻元网络模型分析了传输长度与栅极电压的依赖关系,发现接触电阻元阻值和半导体电阻元阻值的比例随栅极电压增大而下降是传输长度随栅极电压变化的主要原因。3.为了进一步研究影响a-IGZO TFT的源漏接触特性的物理因素,首次采用扫描开尔文探针显微镜(SKPM)法分别提取了器件源极和漏极的接触电阻。通过测量a-IGZO TFT在不同栅极电压下的表面势,分别计算出器件的沟道电阻及源极、漏极接触电阻,发现器件的源极、漏极接触电阻均随栅极电压的增大而减小,并且漏极接触电阻总是小于源极接触电阻,表明电极下方a-IGZO薄膜的电阻是接触电阻的组成部分,但并非决定接触电阻的唯一因素。为了分析导致源极、漏极接触电阻不对称性的原因,通过建立Ti-TiOx-IGZO类肖特基接触的能带模型,对源极和漏极电极金属与a-IGZO薄膜界面附近的能带结构分别进行了研究,发现源极和漏极界面处的类肖特基结在源漏电压的作用下处于不同的偏置状态是导致源漏接触电阻不对称的原因。因此将a-IGZO TFT源漏接触电阻的产生和变化归因于电极下方a-IGZO薄膜的体电阻和界面处类肖特基结电阻的共同作用,并据此提出两种改进器件接触特性的工艺方案。4.为了通过表征a-IGZO TFT的低频噪声特性分析器件中沟道与栅绝缘层的界面性质,首先设计并搭建了一套用于TFT低频噪声特性表征的测试系统,可在器件电学性能未发生明显退化的较短时间内完成低频噪声谱的测试。基于本系统对三种退火条件的a-IGZO TFT在不同栅极电压下的低频噪声特性进行了表征,发现器件的低频噪声属于1/f噪声。通过测试不同沟道尺寸的器件的噪声谱,发现噪声起源的空间位置在器件的沟道区域。为了获取界面附近陷阱物理性质的有关信息,首次运用同时考虑沟道载流子数涨落和与之相关的迁移率涨落的统一模型对a-IGZO TFT的归一化源漏电流噪声谱密度与栅极电压的关系进行了分析,计算出器件界面附近栅绝缘层中的边界态密度及荷电陷阱的空间分布趋势,发现退火温度的升高使边界态密度降低,并使荷电陷阱的分布更集中于界面附近。通过综合考虑器件的噪声特性和正栅极电压应力退化特性,可将这一发现归因于退火温度升高对降低边界陷阱密度和界面陷阱密度的有效性的差异。
[Abstract]:At present, the amorphous indium gallium zinc oxide thin film transistor (a-IGZO TFT) amorphous oxide semiconductor TFT represented by domestic and foreign researchers' attention.A-IGZO TFT compared with the traditional silicon based TFT, and has high transfer rate, low off state leakage current, good uniformity, low manufacturing cost and excellent properties, in model shows very promising technology in the field. However, due to the amorphous nature of a-IGZO, resulting in a-IGZO TFT there are still many scientific problems limit its application in display industry. The outstanding problems include contact resistance device miniaturization in reliability problems and ask devices in bias and light a long time. Etc. in order to solve these problems, we need to in-depth understanding of the device physics related scientific problems. This thesis for a-IGZO TFT and characterization methods of the integrated use of a variety of contact characteristics of the device and interface The characteristics were characterized by physical factors which have impact on device characteristics. The main research contents and results of this paper are as follows: 1. by DC magnetron sputtering technology anti overlapping common back gate type a-IGZO TFT were prepared by optimizing process parameters and successfully fabricated devices with good electrical properties. By changing the annealing temperature, compared with the significance of the series of samples were prepared for analysis. In order to use the physical device physical contact properties and interfacial characteristics of a-IGZOTFT effectively, first need to accurately extract the threshold voltage of the device, the electrical parameters of effective mobility, suitable for discussion and analysis of the transistor electrical parameters commonly used extraction methods on a-IGZO TFT. And then put forward a method for extracting dependencies considering a-IGZO mobility and gate voltage of the nonlinear electrical parameters were proposed by transfer characteristics of a-IGZO TFT Together, accurate extraction of the different annealing temperature a-IGZO TFT threshold voltage, mobility and other electrical parameters, physical nature of the.2. and analyzed the effect of annealing temperature of these electrical parameters in order to study the a-IGZO TFT source and drain contact characteristics, first need to accurately extract the contact resistance of the device. By optimizing the channel resistance method. To adapt to the characteristics in a-IGZO TFT contact resistance with the gate voltage changes, extracting devices working in the linear region of the contact resistance in different gate voltage value and the transmission length value. Then study the dependence of the contact resistance device and the transmission length and gate voltage, found that the contact resistance and the transmission length with the device the increase of the gate voltage decreases. The contact resistance and the channel resistance meets the same gate voltage dependence, indicating resistance source drain a-IGZO film electrode area is below. As an important part of the total contact resistance. And then use the resistance element network model to analyze the dependence of the transmission length and gate voltage, contact resistance and resistance element found in semiconductor resistance resistance element ratio decreases with the gate voltage is mainly due to physical factors.3. transmission length changes with the gate voltage in order to further study the effect of a-IGZO TFT source drain contact characteristics, for the first time using scanning Kelvin probe microscopy (SKPM) method were used to extract the device source and drain contact resistance. Through the measurement of a-IGZO TFT in different gate voltage under the surface potential, calculate the channel resistance and the source device, drain contact resistance, found that the device source, the drain contact resistance decreases with the increase of the gate voltage and the drain contact resistance is smaller than the source contact resistance showed that the resistance of the electrode film is a-IGZO below the contact Part of the resistance, but not the only factor that determines the contact resistance. In order to analyze the cause of source, drain causes contact resistance asymmetry, energy band model through the establishment of Ti-TiOx-IGZO Schottky contact, the source and drain electrodes near the interface between metal and a-IGZO thin film on the band structure, we find that the source drain the interface type Schottky junction in the source drain voltage under different bias in the state is the cause of the source drain contact resistance asymmetry. So will produce and change a-IGZO TFT source drain contact resistance of the electrode is attributed to the a-IGZO film body resistance and interface resistance type Schottky junction interaction, and puts forward two kinds of process for improving the contact characteristics of.4. devices in order to analyze the interfacial properties of the channel layer and the gate insulating device in low frequency noise characterized by a-IGZO TFT, the first And design a testing system for TFT low frequency noise characterization can be set up in the electrical performance is not significantly degraded in low frequency noise spectrum test in a relatively short period of time. The low frequency noise characteristics of a-IGZO TFT on the three annealing condition of this system in different gate voltage based on low frequency were characterized, found the noise device belongs to the 1/f noise. The noise by testing devices with different channel size spectrum, space position noise originated in the channel region of the device. In order to obtain information about physical properties near the interface trap, for the first time by considering the relationship between the normalized source unified model of channel carrier number fluctuation and the relative migration rate the fluctuation of a-IGZO TFT leakage current noise spectral density and gate voltage are analyzed, calculating device near the interface of the gate insulating boundary layer in the density of States and charge trapping The trend of the spatial distribution of wells, found that annealing temperature increases the boundary state density decrease, and make the distribution of charge traps in more concentrated near the interface. By considering the noise characteristics of the devices and positive gate voltage stress degradation characteristics, this can be attributed to the high temperature annealing was found to reduce the differences in the effectiveness of border traps the density and interface trap density.

【学位授予单位】：南京大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TN321.5

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