面向片上光互连的高速光集成芯片研究

发布时间：2018-04-15 04:13

  本文选题：光子集成 + 片上光互连　； 参考：《浙江大学》2015年博士论文

【摘要】：随着信息和通信技术的发展,人们对于通信网络的传输、高性能计算机和高端服务器提出了更高的要求。光集成技术凭借其体积小、低能耗、大带宽等优点,在光互连、光通信等领域获得越来越多的青睐。在降低成本和提高性能的愿望驱使下,集成光电子器件朝着更高集成度的方向不断发展。一方面具有采用高折射率差的硅波导减小尺寸；另一方面,将所有光功能以单片或者混合集成的方式整合在硅基材料。基于硅基的光子集成电路不仅具有超高带宽、超快传输速率、抗电磁干扰和低能耗等优势,还与CMOS工艺兼容,使得超紧凑的光子集成系统成为可能。在诸如芯片间、芯片内部采用光互连的技术可突破电互连在带宽、功耗等方面的瓶颈。本论文对面向片上光互连的高速光子集成芯片做了一些研究。首先,在无源器件方面,针对硅基阵列波导光栅(AWG),提出了三种用于提高集成度、减小器件尺寸的方法。第一种是基于微弯结构的硅基AWG。在AWG的阵列波导区域设计一系列周期性的弯曲结构,其弯曲半径5μμm,该弯曲结构可以使AWG在有限的空间实现较大的长度差。研制了一个15通道400 GHz的微弯型AWG,阵列波导区域由34条带有微弯结构的波导排列而成,采用交叠型的自由传输区(FPR)结构,该器件的总面积只有163μm×147μm。第二种是采用光子晶体作为反射镜的AWG,它在1450 nm到1650 nm的波长范围内,反射率均大于90%。制作的9通道400 GHz光子晶体反射式AWG尺寸仅为134μm×125μm。第三种是采用布拉格光栅作为反射镜的AWG,光栅的周期370 nm,gap为150 nm,共有10个周期,反射率在300nm的宽带范围内均大于95%。9通道400GHz的布拉格光栅反射式AWG其尺寸为130μm×100μm。其次,在有源器件方面,设计并制作了集总电极型的Ⅲ-Ⅴ/Si混合集成电吸收调制器(EAM),其调制长度为100 μm,采用两段式倏逝波耦合的超短taper,该taper总的长度只有45μm,耦合效率大于98%。摸索出了一套基于聚合物BCB辅助键合技术的Ⅲ-Ⅴ/Si混合集成有源器件的制作工艺。然后构建测试平台进行测试,测得其带宽为17 GHz,并可以观察到10 Gb/s,20 Gb/s,30 Gb/s效果良好的背靠背传输的眼图。此外,还可以施加足够的反向偏置电压将其作为探测器使用,测得响应率为0.72 A/W。再次,在片上光互连集成芯片的探究方面,将无源的AWG和有源的EAM混合集成,研制出5个通道、通道间隔200 GHz、每通道速率不小于20 Gb/s,总容量为100 Gb/s的混合集成调制器阵列。最后,通过进一步优化,实现了180 Gb/s高速混合集成电吸收调制器阵列、180Gb/s高速混合集成电吸收探测器阵列的研制。并且,在实验室构建了高速片上光互连系统,即让光经过调制器调制后通过复用器与解复用器在终端探测器进行探测,得到了初步研究结果。
[Abstract]:With the development of information and communication technology, people put forward higher requirements for communication network transmission, high performance computers and high-end servers.Due to its advantages of small size, low energy consumption and large bandwidth, optical integration technology has been more and more popular in optical interconnection, optical communication and other fields.Driven by the desire to reduce costs and improve performance, integrated optoelectronic devices are moving towards higher levels of integration.On the one hand, the silicon waveguide with high refractive index difference is used to reduce the size; on the other hand, all optical functions are integrated into silicon based materials in a monolithic or hybrid manner.Silicon based photonic integrated circuits not only have the advantages of ultra-high bandwidth, ultra-fast transmission rate, anti-electromagnetic interference and low energy consumption, but also compatible with CMOS process, which makes ultra-compact photonic integration system possible.Among chips, optical interconnection can break through the bottleneck of bandwidth and power consumption.In this paper, we do some research on high-speed photonic integrated chip for optical interconnection on chip.Firstly, in the aspect of passive devices, three methods are proposed to improve the integration and reduce the device size for the silicon arrayed waveguide grating (AWGG).The first is silicon based AWGs based on microbending structure.A series of periodic bending structures with a bending radius of 5 渭 m are designed in the arrayed waveguide region of AWG. The bending structure enables the AWG to achieve a large length difference in a limited space.A microcurved AWGs with 15 channels of 400 GHz has been developed. The arrayed waveguide region is composed of 34 waveguides with microcurved structures, and an overlapping free transmission region (FPR) structure is adopted. The total area of the device is only 163 渭 m 脳 147 渭 m.The second is the photonic crystal as the mirror AWG.The reflectivity is greater than 90 in the wavelength range of 1450 nm to 1650 nm.The reflective AWG size of the 9 channel 400 GHz photonic crystal is only 134 渭 m 脳 125 渭 m.The third one is the Bragg grating as the mirror. The grating has a period of 370 nm gap of 150 nm and a total of 10 periods. The reflectivity of the grating is larger than 95.9 channel 400GHz in the wide band range of 300nm. Its size is 130 渭 m 脳 100 渭 m.Secondly, in the aspect of active devices, we design and fabricate the type 鈪，

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