用于TFT-LCD集成芯片的低功耗多级运算放大器研究

发布时间：2018-06-18 03:31

本文选题：TFT-LCD + 多级运算放大器　；参考：《天津大学》2016年博士论文

【摘要】：随着现代电子显示设备市场的日益发展,TFT-LCD因其高分辨率、低功耗、轻重量、长寿命等特点成为液晶乃至面板显示技术的主流,并被广泛应用在大、中、小尺寸的主流电子产品中。低功耗、高集成度、高分辨率的薄膜晶体管显示集成芯片需要能够驱动大容性负载、大带宽等特性的低功耗多级运算放大器。然而低功耗放大器的设计方法与CMOS工艺晶体管的特征尺寸紧密相关,所以研究不同尺寸工艺下放大器的设计方法具有一定意义。器件需要折中稳定性、带宽和芯片面积等参数,所以研究多级运算放大器的频率补偿技术显得很有必要。根据芯片的低功耗和驱动容性大负载等需求,本文研究了低功耗多级运算放大器的设计方法。改进了自适应粒子群优化算法,并分别采用单目标和多目标算法设计两级密勒电容补偿运算放大器和三级运算放大器。基于g_m/I_D方法,研究了高阶短沟道尺寸工艺下共源放大器的失真和灵敏度等特性。设计了一款驱动容性大负载的低功耗四级运算放大器,通过流片测试验证;研究了多级运算放大器的频率补偿技术;在高阶短沟道尺寸工艺条件下设计一款有源密勒电容反馈和串联RC补偿结构的三级运算放大器,通过基于版图后仿真验证。本文的主要创新点包括:1、改进一种基于g_m/I_D方法的自适应粒子群优化算法。在CMOS工艺下,以两级密勒电容补偿运算放大器和三级运算放大器为例说明:它既节约晶体管级电路的设计时间,又降低电路设计的误差。在直流增益、增益带宽积、噪声和相位裕度等参数之间,该方法为设计者提供更多的设计余量。2、设计一款驱动容性大负载的低功耗四级运算放大器。从放大器输出端到第一级输出端形成有源反馈路径,引入一个低频左半平面零点以抵消低频左半平面非主极点。在低功耗条件下,它既维持放大器的稳定性不变,又提高其驱动容性负载的能力。芯片测试结果显示该设计改善了放大器的最优值。3、设计一款有源密勒电容反馈和串联RC补偿结构的低功耗三级运算放大器。串联RC结构引入的低频左半平面零点抵消一个低频左半平面非主极点,提高了相位裕度。调节RC值来优化放大器的共轭非主极点和Q值而不增加其静态功耗,从而拓展放大器的增益带宽积。
[Abstract]:With the development of modern electronic display equipment market, TFT-LCD has become the mainstream of LCD and panel display technology because of its high resolution, low power consumption, light weight, long life, and has been widely used in large, medium and large. Small-sized mainstream electronics. Low power, high integration, high resolution thin film transistor display integrated chips need low power multistage operational amplifiers that can drive large capacitive loads and large bandwidth. However, the design method of low power amplifier is closely related to the characteristic size of CMOS process transistor, so it is significant to study the design method of amplifier in different size technology. The device needs compromise stability, bandwidth and chip area, so it is necessary to study the frequency compensation technology of multistage operational amplifier. According to the demand of low power and capacitive driving, the design method of low power multistage operational amplifier is studied in this paper. The adaptive particle swarm optimization (APSO) algorithm is improved, and a two-stage Miller capacitive compensation operational amplifier and a three-stage operational amplifier are designed using single-objective and multi-objective algorithms, respectively. The distortion and sensitivity of the common-source amplifier in high-order short channel size process are studied based on the GSP method. A low power four-level operational amplifier with capacitive load is designed, which is verified by chip test, and the frequency compensation technology of multi-stage operational amplifier is studied. A three-stage operational amplifier with active Miller capacitance feedback and series RC compensation structure is designed under the condition of high-order short channel size technology. The simulation based on layout is carried out. The main innovations of this paper include: 1, an adaptive particle swarm optimization algorithm based on GSP / IID method is improved. In CMOS process, the examples of two-stage Miller capacitor compensation operational amplifier and three-stage operational amplifier show that it not only saves the design time of transistor-level circuit, but also reduces the error of circuit design. Between the parameters of DC gain, gain bandwidth product, noise and phase margin, this method provides designers with more design margin. An active feedback path is formed from the amplifier output to the first stage output, and a low frequency left half plane zero is introduced to offset the low frequency left half plane non-main pole. Under low power consumption, it not only keeps the stability of amplifier constant, but also improves its capacity to drive capacitive load. The chip test results show that the design improves the optimal value of amplifier. A low power three-stage operational amplifier with active Miller capacitor feedback and series RC compensation structure is designed. The low frequency left half plane zero point introduced by series RC structure cancels a low frequency left half plane non-main pole and improves the phase margin. The RC value is adjusted to optimize the conjugate non-main poles and Q values of the amplifier without increasing its static power consumption, thus expanding the gain bandwidth product of the amplifier.
【学位授予单位】：天津大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TN722.77;TN873.93

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