ALICE ITS单片式有源像素传感器的低噪声前端电子学的研究与实现
发布时间：2018-07-28 14:14
【摘要】：在2019年LHC第二次停止运行期间,ALICE将对其内部径迹探测器ITS进行升级。在径迹探测器中,降低噪声不仅可有效提高能量测量精度,同时也能提高探测效率,因此低噪声是ITS升级的重要指标之一。单片式有源像素探测器将传感器和读出电子学集成于同一硅片上,具有小输入电容、低物质量、易安装等优势,因此ALICE ITS升级将采用单片式有源像素探测器。在一定功耗和带宽条件下,减小前端电子学输入电容和反馈电容可有效降低噪声,因此本文针对低噪声前端电路提出了四种降噪方法：1)、新的源漏极跟随器电路结构；2)、用两层走线金属间寄生电容实现小容量反馈电容,并通过适当增加距离和面积、改变电容结构等方法减小各像素间反馈电容的离散；3)、利用蒙特卡罗仿真实现在小面积约束条件下,降低不同像素间晶体管不一致引起的电荷阂值离散,从而降低由不同像素间电荷阈值离散引入的噪声；4)、通过增加共源共栅晶体管减小输入管栅漏间电压增益,从而减小不同像素间密勒等效电容的离散,进一步降低不同像素间电荷阈值的离散。本文具体研究内容和创新点主要体现在如下几个方面：1、提出了新的源漏极跟随器电路结构,减小了放大器输入电容,从而降低了噪声。源极跟随器较单级放大器而言,其输入晶体管栅源间寄生电容对放大器输入电容没有贡献从而有较大的电荷-电压转换增益,被广泛应用于单片式有源像素探测器电荷读出,然而,传统的两管结构源极跟随器仍有输入管栅漏间寄生电容对输入电容的贡献,为了消除输入管栅漏间寄生电容对输入电容的贡献,从而降低噪声,本文提出了新型的五管结构源漏极跟随器,实现了源极和漏极都跟随栅极电势,消除了输入晶体管栅源间和栅漏间寄生电容对输入电容的贡献,进一步减小了输入电容,且其电压增益比传统源极跟随器更接近1,从而增大了电荷-电压转换增益,降低了噪声。该新型源漏极跟随器电路已集成在了单片式有源像素探测器芯片INVESTIGATOR里,电路测试结果符合预期,同时,该芯片还通过增大传感器PN结反向偏置电压等方法降低PN结电容,进一步降低噪声。INVESTIGATOR已使用55Fe辐射源进行测试,测试结果表明：当PN结的反向偏置电压从0V增大到-6V时,PN结电容减小了49%,即从5.96 fF减小到3.04fF,等效输入噪声电荷减小了36%,即从80e-减小到51 e-；新型源漏极跟随器电路输入电容比传统源极跟随器电路减小了9%，即从3.04fF减小到2.76 fF,等效输入噪声电荷减小了25%,即从51e-减小到38e-。2、用两层走线金属间寄生电容实现了小容量反馈电容,并通过适当增加距离和面积、改变电容结构等方法减小各像素间反馈电容的离散,以提高电荷-电压转换增益,达到提升电路信噪比的目的。电荷灵敏前置放大器可以靠减小反馈电容来获得高转换增益,降低噪声,因此本文用两层走线金属间寄生电容实现了小容量反馈电容,并通过两种方法减小不同像素间反馈电容的离散：其一是用不相邻的两层金属增大反馈电容的距离和面积,其二是通过改变电容结构减小边缘效应对反馈电容容值的影响。这种反馈电容已应用于单片式有源像素探测器芯片pA_LP前端电子学的设计,仿真结果表明：通过第二层走线金属和第四层走线金属实现了0.2fF的反馈电容,电荷灵敏前置放大器在峰值时间为300ns时,等效输入噪声电荷约为18e-,每个像素功耗仅为45 nW。3、利用蒙特卡罗仿真实现了在小面积约束条件下,降低由不同像素间晶体管不一致引起的电荷阈值的离散,从而降低由不同像素间电荷阈值离散引入的噪声。这种方法已应用于单片式有源像素探测器芯片ALPIDE前端电子学不同像素间电荷阈值离散性的优化,ALPIDE前端电子学是一个开环电荷读出电路,由放大器和电流比较器组成,最大版图面积限制为220 μm2。通过蒙特卡罗仿真分析每个晶体管对不同像素间电荷阈值离散的贡献,根据其贡献大小,对晶体管尺寸进行优化,降低了由不同像素间晶体管不一致引起的电荷阈值离散。仿真结果表明：优化后的前端电子学由不同像素间晶体管不一致引起的电荷阈值离散减小了67%,即从6.10e-减小到1.99e-,同时,随机噪声也减小了9%,即从3.70e-减小到3.37e-。4、通过增加共源共栅晶体管减小输入晶体管栅漏间电压增益,从而减小不同像素间密勒等效电容值的离散,进一步降低电荷阈值离散。这种方法已应用于ALPIDE前端电子学不同像素间电荷阈值离散性的优化,在第二级电流比较器输入管漏极增加一个共源共栅晶体管,减小了电流比较器输入管的栅漏间电压增益,从而降低了由第二级输入管栅漏间寄生电容在不同像素间不一致引起的电荷阈值离散。仿真结果表明：优化后的前端电子学由第二级输入晶体管栅漏间寄生电容不一致引起的电荷阈值离散减小了73%,即从2.19 e-/0.1fF减小到0.59e-/0.1fF。优化后的前端读出电路已集成在ALPIDE探测器里,每个像素仅消耗40 nW模拟功耗,ALPIDE芯片最终会使用在ALICE ITS升级探测器中。
[Abstract]:During the second stop operation of LHC in 2019, ALICE will upgrade its internal track detector ITS. In the track detector, reducing noise can not only effectively improve the accuracy of energy measurement, but also improve the detection efficiency. Therefore, low noise is one of the important indicators of the ITS upgrade. Electronics is integrated on the same silicon chip, with small input capacitance, low quality, easy installation and so on. Therefore, ALICE ITS upgrade will use a single chip active pixel detector. Under certain power and bandwidth conditions, reducing the input capacitance and feedback capacitance of front end electronics can reduce the noise effectively. Therefore, this paper proposes a low noise front end circuit. Four noise reduction methods: 1), the new source drain pole follower circuit structure, 2), the small capacity feedback capacitance is realized with the parasitic capacitance between the two layers of wire, and the discrete capacitance of each pixel is reduced by means of increasing the distance and area and changing the capacitance structure. 3), the Monte Carlo simulation is used to realize the small area constraint conditions. To reduce the charge threshold discreteness caused by the inconsistency of transistor inconsistencies among different pixels, thus reducing the noise caused by the discretization of the charge threshold between different pixels; 4) reducing the voltage gain of the input gate leakage by increasing the common source gate transistor, thus reducing the discretization of the Miller equal effective capacitance between different pixels and further reducing the charge between different pixels. The content and innovation of this paper are mainly reflected in the following aspects: 1, a new circuit structure of source drain follower is proposed, which reduces the input capacitance of the amplifier and reduces the noise. Compared with the single amplifier, the source follower has no parasitic capacitance between the gate source of the input transistor and the input capacitance of the amplifier. The contribution thus has a larger charge voltage conversion gain, which is widely used in single chip active pixel detector charge readout. However, the traditional two tube structure source follower still has the contribution of the input gate leakage parasitic capacitance to the input capacitance, in order to eliminate the contribution of the input gate leakage capacitance to the input capacitance and thus reduce the noise. In this paper, a new type of five tube structure source drain follower is proposed. The source and drain are all followed by the grid potential. The contribution of the input transistor gate and the gate leakage parasitic capacitance to the input capacitance is eliminated, and the input capacitance is further reduced, and the voltage gain is closer to 1 than the traditional source follower, thus increasing the charge voltage. The new source drain follower circuit has been integrated in the monolithic active pixel detector chip INVESTIGATOR, and the circuit test results conform to the expectation. At the same time, the chip also reduces the PN junction capacity by increasing the reverse bias voltage of the sensor PN junction, and further reduces the noise.INVESTIGATOR using 55Fe. The test results show that when the reverse bias voltage of PN junction is increased from 0V to -6V, the PN junction capacitance is reduced by 49%, that is, from 5.96 fF to 3.04fF, and the equivalent input noise charge decreases by 36%, that is, from 80e- to 51 e-, and the circuit input capacitance of the new source drain follower circuit is reduced by 9% than that of the traditional source follower circuit. From 3.04fF to 2.76 fF, the equivalent input noise charge is reduced by 25%, which is reduced from 51e- to 38e-.2, and a small capacity feedback capacitance is realized with the parasitic capacitance between the two layers of the wire. The capacitance of each pixel is reduced by increasing the distance and area and the capacitance structure is changed to increase the charge voltage conversion gain. To improve the signal to noise ratio of the circuit, the charge sensitive preamplifier can gain high conversion gain and reduce the noise by reducing the feedback capacitance. Therefore, a small capacity feedback capacitance is realized by two layer walk Wire parasitic capacitance, and the discretization of the feedback capacitance between different pixels is reduced by two methods: one is the non adjacent two. The layer metal increases the distance and area of the feedback capacitance, and the second is to reduce the influence of the edge effect on the capacitance of the feedback capacitance by changing the capacitance structure. This feedback capacitance has been applied to the design of the front end electronics of the monolithic active pixel detector chip pA_LP. The simulation results show that the second layers of wire and fourth layers of wire are solid. The feedback capacitance of 0.2fF is presented. When the charge sensitive preamplifier is at the peak time of 300ns, the equivalent input noise charge is about 18e-, and the power consumption of each pixel is only 45 nW.3. By Monte Carlo simulation, the discrete charge threshold caused by the inconsistency of the transistors between different pixels is reduced by the Monte Carlo simulation. This method has been applied to the optimization of the discreteness of the charge threshold between different pixels in the front-end electronics of the monolithic active pixel detector chip ALPIDE. The ALPIDE front-end electronics is an open loop charge readout circuit, consisting of an amplifier and a current comparator, and the maximum layout area is limited to 220 The contribution of each transistor to the discretization of the charge threshold between different pixels is analyzed by Monte Carlo simulation. According to its contribution, the transistor size is optimized, which reduces the discretization of the charge threshold caused by the inconsistency of transistors between different pixels. The simulation results show that the optimized front-end electronics is composed of transistors with different pixels. The discretization of the charge threshold caused by inconsistency decreases by 67%, that is, from 6.10e- to 1.99e-, and at the same time, the random noise is reduced by 9%, which is reduced from 3.70e- to 3.37e-.4. By increasing the common source gate transistor, the voltage gain of the gate leakage between the input transistors is reduced, thus the discretization of the Miller equivalent capacitance between different pixels is reduced and the charge threshold is further reduced. This method has been applied to the optimization of the discreteness of the charge threshold between different pixels in the ALPIDE front-end electronics. A common source transistor is added to the drain pole of the second stage current comparator, which reduces the voltage gain between the gate leakage of the current comparator input tube, and thus reduces the parasitic capacitance of the second stage input gate leakage. The simulation results show that the charge threshold discretization of the optimized front-end electronics decreases by 73%, which is caused by the disagreement of the parasitic capacitance of the second level input transistor gate leakage, that is, the front end readout circuit from 2.19 e-/0.1fF to the 0.59e-/0.1fF. optimization has been integrated into the ALPIDE detector. Each pixel consumes only 40 nW of analog power dissipation, and the ALPIDE chip will eventually be used in the ALICE ITS upgrade detector.
【学位授予单位】：华中师范大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TP212
本文编号：2150478
[Abstract]:During the second stop operation of LHC in 2019, ALICE will upgrade its internal track detector ITS. In the track detector, reducing noise can not only effectively improve the accuracy of energy measurement, but also improve the detection efficiency. Therefore, low noise is one of the important indicators of the ITS upgrade. Electronics is integrated on the same silicon chip, with small input capacitance, low quality, easy installation and so on. Therefore, ALICE ITS upgrade will use a single chip active pixel detector. Under certain power and bandwidth conditions, reducing the input capacitance and feedback capacitance of front end electronics can reduce the noise effectively. Therefore, this paper proposes a low noise front end circuit. Four noise reduction methods: 1), the new source drain pole follower circuit structure, 2), the small capacity feedback capacitance is realized with the parasitic capacitance between the two layers of wire, and the discrete capacitance of each pixel is reduced by means of increasing the distance and area and changing the capacitance structure. 3), the Monte Carlo simulation is used to realize the small area constraint conditions. To reduce the charge threshold discreteness caused by the inconsistency of transistor inconsistencies among different pixels, thus reducing the noise caused by the discretization of the charge threshold between different pixels; 4) reducing the voltage gain of the input gate leakage by increasing the common source gate transistor, thus reducing the discretization of the Miller equal effective capacitance between different pixels and further reducing the charge between different pixels. The content and innovation of this paper are mainly reflected in the following aspects: 1, a new circuit structure of source drain follower is proposed, which reduces the input capacitance of the amplifier and reduces the noise. Compared with the single amplifier, the source follower has no parasitic capacitance between the gate source of the input transistor and the input capacitance of the amplifier. The contribution thus has a larger charge voltage conversion gain, which is widely used in single chip active pixel detector charge readout. However, the traditional two tube structure source follower still has the contribution of the input gate leakage parasitic capacitance to the input capacitance, in order to eliminate the contribution of the input gate leakage capacitance to the input capacitance and thus reduce the noise. In this paper, a new type of five tube structure source drain follower is proposed. The source and drain are all followed by the grid potential. The contribution of the input transistor gate and the gate leakage parasitic capacitance to the input capacitance is eliminated, and the input capacitance is further reduced, and the voltage gain is closer to 1 than the traditional source follower, thus increasing the charge voltage. The new source drain follower circuit has been integrated in the monolithic active pixel detector chip INVESTIGATOR, and the circuit test results conform to the expectation. At the same time, the chip also reduces the PN junction capacity by increasing the reverse bias voltage of the sensor PN junction, and further reduces the noise.INVESTIGATOR using 55Fe. The test results show that when the reverse bias voltage of PN junction is increased from 0V to -6V, the PN junction capacitance is reduced by 49%, that is, from 5.96 fF to 3.04fF, and the equivalent input noise charge decreases by 36%, that is, from 80e- to 51 e-, and the circuit input capacitance of the new source drain follower circuit is reduced by 9% than that of the traditional source follower circuit. From 3.04fF to 2.76 fF, the equivalent input noise charge is reduced by 25%, which is reduced from 51e- to 38e-.2, and a small capacity feedback capacitance is realized with the parasitic capacitance between the two layers of the wire. The capacitance of each pixel is reduced by increasing the distance and area and the capacitance structure is changed to increase the charge voltage conversion gain. To improve the signal to noise ratio of the circuit, the charge sensitive preamplifier can gain high conversion gain and reduce the noise by reducing the feedback capacitance. Therefore, a small capacity feedback capacitance is realized by two layer walk Wire parasitic capacitance, and the discretization of the feedback capacitance between different pixels is reduced by two methods: one is the non adjacent two. The layer metal increases the distance and area of the feedback capacitance, and the second is to reduce the influence of the edge effect on the capacitance of the feedback capacitance by changing the capacitance structure. This feedback capacitance has been applied to the design of the front end electronics of the monolithic active pixel detector chip pA_LP. The simulation results show that the second layers of wire and fourth layers of wire are solid. The feedback capacitance of 0.2fF is presented. When the charge sensitive preamplifier is at the peak time of 300ns, the equivalent input noise charge is about 18e-, and the power consumption of each pixel is only 45 nW.3. By Monte Carlo simulation, the discrete charge threshold caused by the inconsistency of the transistors between different pixels is reduced by the Monte Carlo simulation. This method has been applied to the optimization of the discreteness of the charge threshold between different pixels in the front-end electronics of the monolithic active pixel detector chip ALPIDE. The ALPIDE front-end electronics is an open loop charge readout circuit, consisting of an amplifier and a current comparator, and the maximum layout area is limited to 220 The contribution of each transistor to the discretization of the charge threshold between different pixels is analyzed by Monte Carlo simulation. According to its contribution, the transistor size is optimized, which reduces the discretization of the charge threshold caused by the inconsistency of transistors between different pixels. The simulation results show that the optimized front-end electronics is composed of transistors with different pixels. The discretization of the charge threshold caused by inconsistency decreases by 67%, that is, from 6.10e- to 1.99e-, and at the same time, the random noise is reduced by 9%, which is reduced from 3.70e- to 3.37e-.4. By increasing the common source gate transistor, the voltage gain of the gate leakage between the input transistors is reduced, thus the discretization of the Miller equivalent capacitance between different pixels is reduced and the charge threshold is further reduced. This method has been applied to the optimization of the discreteness of the charge threshold between different pixels in the ALPIDE front-end electronics. A common source transistor is added to the drain pole of the second stage current comparator, which reduces the voltage gain between the gate leakage of the current comparator input tube, and thus reduces the parasitic capacitance of the second stage input gate leakage. The simulation results show that the charge threshold discretization of the optimized front-end electronics decreases by 73%, which is caused by the disagreement of the parasitic capacitance of the second level input transistor gate leakage, that is, the front end readout circuit from 2.19 e-/0.1fF to the 0.59e-/0.1fF. optimization has been integrated into the ALPIDE detector. Each pixel consumes only 40 nW of analog power dissipation, and the ALPIDE chip will eventually be used in the ALICE ITS upgrade detector.
【学位授予单位】：华中师范大学
【学位级别】：博士
【学位授予年份】：2016
【分类号】：TP212
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