基于BLP模型的AHB总线防火墙设计与实现

发布时间：2018-04-20 18:34

本文选题：总线防火墙 + 访问控制　；参考：《计算机工程与设计》2017年04期

【摘要】：为应对嵌入式SoC片上资源的非授权访问,需要对片上资源进行访问控制,为此将防火墙概念引入AHB总线的安全性设计。基于BLP模型对总线安全需求进行形式化描述,设计并论证总线安全通信规则,将安全策略扩展至底层硬件。根据总线传输特点,设计传输检测单元进行批量规则审核,降低防火墙对数据传输速率的影响。实验结果表明,防火墙造成的实际性能损耗不足10%,面积增加53.8%,以较小的性能和面积损失获得了安全防护能力的巨大提升。
[Abstract]:In order to deal with the unauthorized access to the resources on embedded SoC chip, it is necessary to control the access to the resources on the chip. Therefore, the concept of firewall is introduced into the security design of AHB bus. Based on the BLP model, the bus security requirements are formalized, the bus security communication rules are designed and demonstrated, and the security policy is extended to the underlying hardware. According to the characteristics of bus transmission, the transmission detection unit is designed to carry out batch regular audit to reduce the influence of firewall on the data transmission rate. The experimental results show that the actual performance loss caused by the firewall is less than 10%, the area is increased by 53.8%, and the capability of security protection is greatly improved with smaller performance and area loss.
【作者单位】：信息工程大学密码工程学院;
【分类号】：TP393.08

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