支持虚拟化和带宽分享的网络适配器FPGA实现
发布时间：2019-04-07 16:16
【摘要】：伴随着以太网技术的快速发展,万兆以太网技术已经变得成熟。再加上CPU的性能不断提高,PCI Express总线的带宽越来越宽。万兆以太网以网络适配器形式通过PCI Express总线部署在服务器平台上已经变得现实。与此同时,云计算的概念被提出后,云计算的热潮也席卷了各个行业,众多IT企业和电信运营商都在向云计算进军,都已经推出了自己相关的服务。随着虚拟化技术的发展和云计算规模的壮大,在数据中心中的服务工作量日益增长,租户数量也随之增多,传统的数据中心网络也暴露出了很多局限性。局限性主要集中在可扩展性和资源合理分配问题上。可扩展性是当规模庞大后再扩建带来成本高,而且会影响原有的网络服务质量。分配在问题上,像CPU和内存等硬件资源有合理的分配管理,但是网络带宽仍然是使用传统的“尽力而为”方式被共享。网络中经常会出现堵塞,租户正面临着带宽分配不公平的困境。网络资源的分配变成了一个迫切而棘手的问题。虽然很多相关的技术解决方案目前也有被提出,但是那些解决方案都有各自的局限性,到目前为止没有一种完美的解决方案。针对这些问题,本文提出了一种与机架交换机一起控制发送带宽的解决方案,在一定程度上解决了带宽分享问题,并将数据中心网络拓扑中的服务器端网络适配器硬件部分进行了实现。网络适配器硬件部分是在FPGA上进行实现的,采用Altera的Strativ IV 530芯片。实现中采用的主要技术如下：硬件使用DMA技术通过PCI Express总线与CPU实现通信；接口使用万兆以太网接口；虚拟机队列的调度采用差额轮询调度。本设计主要成果如下：整体来说,在一定程度解决带宽分配问题的同时,扩展性问题上也有良好的解决。一台服务器上支持16个虚拟机,一个租户中的虚拟机数量可以软件动态控制分配。细节来说,在支持PCI Express 2.0总线基础上,采用高性能DMA技术,特别是DMA读内存的速率得到大幅提升,以适应本设计需求；万兆以太网接口中将MAC层进行了设计实现；调度中对差额轮询调度在FPGA上进行了实现。实现过程中,采用先功能仿真后下板测试,最终设计得到实现和验证。
[Abstract]:With the rapid development of Ethernet technology, 10 Gigabit Ethernet technology has become mature. In addition, the performance of CPU continues to improve the bandwidth of, PCI Express bus. 10 Gigabit Ethernet as a network adapter deployed on the server platform via PCI Express bus has become a reality. At the same time, the concept of cloud computing has been proposed, cloud computing boom has also swept across various industries, many IT enterprises and telecommunications operators are moving toward cloud computing, have launched their own related services. With the development of virtualization technology and the scale of cloud computing, the service workload in the data center is increasing day by day, and the number of tenants is also increasing. The traditional data center network has also exposed a lot of limitations. The limitation is mainly focused on the problem of scalability and rational allocation of resources. Scalability is when the scale of the re-expansion brings high costs, and will affect the quality of service of the original network. On the problem of allocation, hardware resources such as CPU and memory are reasonably allocated and managed, but the network bandwidth is still shared using the traditional "best effort" method. There are often congestion in the network, tenants are facing unfair bandwidth allocation difficulties. The allocation of network resources has become an urgent and difficult problem. Although many related technical solutions have been proposed, but those solutions have their own limitations, so far there is no perfect solution. In order to solve these problems, this paper proposes a solution to control the transmission bandwidth together with the rack switch, which solves the bandwidth sharing problem to a certain extent. The hardware part of the server-side network adapter in the data center network topology is implemented. The hardware part of the network adapter is implemented on the FPGA, and the Strativ IV 530 chip of Altera is used. The main technologies used in the implementation are as follows: the hardware uses DMA technology to communicate with CPU through PCI Express bus; the interface uses 10 Gigabit Ethernet interface; and the scheduling of virtual machine queue adopts differential polling scheduling. The main achievements of this design are as follows: on the whole, the problem of bandwidth allocation is solved to a certain extent, and the problem of scalability is also well solved. A server supports 16 virtual machines, and the number of virtual machines in a tenant can be dynamically controlled by the software. In detail, on the basis of supporting PCI Express 2.0 bus, the high performance DMA technology, especially the rate of DMA read memory, has been greatly improved to meet the needs of this design. The MAC layer of 10 Gigabit Ethernet interface has been designed and implemented. In scheduling, the difference polling scheduling is implemented on FPGA. In the process of realization, the final design is realized and verified by the function simulation and then the test of the lower board.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP393.11;TP393.05
本文编号：2454218
[Abstract]:With the rapid development of Ethernet technology, 10 Gigabit Ethernet technology has become mature. In addition, the performance of CPU continues to improve the bandwidth of, PCI Express bus. 10 Gigabit Ethernet as a network adapter deployed on the server platform via PCI Express bus has become a reality. At the same time, the concept of cloud computing has been proposed, cloud computing boom has also swept across various industries, many IT enterprises and telecommunications operators are moving toward cloud computing, have launched their own related services. With the development of virtualization technology and the scale of cloud computing, the service workload in the data center is increasing day by day, and the number of tenants is also increasing. The traditional data center network has also exposed a lot of limitations. The limitation is mainly focused on the problem of scalability and rational allocation of resources. Scalability is when the scale of the re-expansion brings high costs, and will affect the quality of service of the original network. On the problem of allocation, hardware resources such as CPU and memory are reasonably allocated and managed, but the network bandwidth is still shared using the traditional "best effort" method. There are often congestion in the network, tenants are facing unfair bandwidth allocation difficulties. The allocation of network resources has become an urgent and difficult problem. Although many related technical solutions have been proposed, but those solutions have their own limitations, so far there is no perfect solution. In order to solve these problems, this paper proposes a solution to control the transmission bandwidth together with the rack switch, which solves the bandwidth sharing problem to a certain extent. The hardware part of the server-side network adapter in the data center network topology is implemented. The hardware part of the network adapter is implemented on the FPGA, and the Strativ IV 530 chip of Altera is used. The main technologies used in the implementation are as follows: the hardware uses DMA technology to communicate with CPU through PCI Express bus; the interface uses 10 Gigabit Ethernet interface; and the scheduling of virtual machine queue adopts differential polling scheduling. The main achievements of this design are as follows: on the whole, the problem of bandwidth allocation is solved to a certain extent, and the problem of scalability is also well solved. A server supports 16 virtual machines, and the number of virtual machines in a tenant can be dynamically controlled by the software. In detail, on the basis of supporting PCI Express 2.0 bus, the high performance DMA technology, especially the rate of DMA read memory, has been greatly improved to meet the needs of this design. The MAC layer of 10 Gigabit Ethernet interface has been designed and implemented. In scheduling, the difference polling scheduling is implemented on FPGA. In the process of realization, the final design is realized and verified by the function simulation and then the test of the lower board.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP393.11;TP393.05
【参考文献】
相关期刊论文 前1条
1 王玉明;杨宗凯;范兵;刘彦;;高效的WF~2Q+调度算法的实现研究[J];微电子学与计算机;2006年01期
，本文编号：2454218
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