面向微能量收集的高效率BUCK转换器设计

发布时间：2018-01-29 19:17

本文关键词： DC-DC PWM BUCK 轻载效率优化高效率死区时间控制　出处：《天津理工大学》2017年硕士论文　论文类型：学位论文

【摘要】：随着无线与低功耗电子器件的发展,以及传感器、微电子机械能量系统(MEMS)等组件的不断进步,引发了微能量收集技术的变革,在将来一大批的新兴应用中,特别是物联网的出现,微能量收集成为必不可缺的要素。微能量收集包括各种能量来源,比如动能、电磁能、热能、原子能和生物能等。对于功率密度仅在几uW/cm2到几十mW/cm2之间的环境能量(包括光、温差、振动等),如此之小的能量要采集并使用它,就必须尽量减小收集过程和电压转换过程的能量损耗,提高电压转换器等电源管理电路的转换效率。本文首先对电源管理控制芯片的产业现状与发展趋势进行了阐述,并介绍了能量收集芯片的重要性,其次针对DC-DC转换器的基本原理,基本连接方式以及驱动方式进行了逐一介绍分析。本文设计了一款基于微能收集的高效率PWM调制的BUCK型转换芯片,该芯片具有静态功耗低,转换效率高等优点,特别是在轻载的效率要远高于一般BUCK型转换器。芯片采用CSMC 0.35um CMOS工艺研制,对包括带隙参考源、误差放大器、比较器、锯齿波生成器、死区时间控制的设计做了重点研究并给出了模拟结果,然后对整体电路的构架设计和系统工作原理进行了详细的分析,并对芯片在轻载时的效率进行了优化。本文所有的模拟仿真是通过Cadence软件模拟环境下的Spectre对子电路和系统的各项参数进行的,仿真结果表明,芯片的子电路以及整体电路在不同的环境下运行正常。在完成子电路、整体电路的原理分析和电路设计仿真之后,对整体电路的版图进行了设计,应用Cadence的Calibre对版图进行了DRC和LVS验证,经MPW流片,使用SOP-4封装。测试结果表明,本设计芯片在输入电压为2.7~5.5V时,输出稳定1.8V,输出波纹在5mV~20mV之间,最大负载电流可达106mA,无负载状态下静态工作电流为2.11uA,其在负载电流为1mA时最低效率为74%,在满载时最高效率可达93%。
[Abstract]:With the development of wireless and low-power electronic devices, as well as the continuous progress of sensors, micro-electro-mechanical energy system (MEMS) and other components, the technology of micro-energy collection has been changed. In a large number of new applications in the future, especially the emergence of the Internet of things, micro-energy collection has become an essential element. Microenergy collection includes various energy sources, such as kinetic energy, electromagnetic energy, thermal energy. Atomic energy and biological energy. For environmental energy (including light, temperature difference, vibration, etc.) with power density between a few uW/cm2 and dozens of mW/cm2, such small energy should be collected and used. The energy loss of the collection process and the voltage conversion process must be minimized. Firstly, the status quo and development trend of power management control chip are described, and the importance of energy collection chip is introduced. Secondly, it aims at the basic principle of DC-DC converter. The basic connection mode and drive mode are introduced and analyzed one by one. In this paper, a high efficiency PWM modulation BUCK conversion chip based on micro-energy collection is designed, which has low static power consumption. The conversion efficiency is high, especially the efficiency of light load is much higher than that of general BUCK converter. The chip is developed by CSMC 0.35um CMOS technology, including bandgap reference source. The design of error amplifier, comparator, sawtooth wave generator and dead-time control are studied in detail and the simulation results are given. Then, the design of the whole circuit frame and the working principle of the system are analyzed in detail. The efficiency of the chip under light load is optimized. All the simulation in this paper is carried out through the Spectre pair of sub-circuits and the parameters of the system under the Cadence software simulation environment. The simulation results show that the sub-circuit and the whole circuit of the chip work normally in different environments. After completing the sub-circuit, the principle analysis of the whole circuit and the circuit design simulation. The layout of the whole circuit is designed, and the layout is verified by DRC and LVS with the Calibre of Cadence. The layout is verified by MPW chip. The test results of SOP-4 package show that when the input voltage is 2.7V 5.5V, the output is stable at 1.8 V, and the output ripple is between 5 MV and 20 MV. The maximum load current is 106mA, the static working current is 2.11uA under no load, the lowest efficiency is 74 when the load current is 1mA, and the maximum efficiency is 933uA when the load current is 1 Ma.
【学位授予单位】：天津理工大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TM46

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