多通道可重构的虚拟逻辑分析仪的研制

发布时间：2018-04-06 20:35

本文选题：逻辑分析仪　切入点：虚拟仪器　出处：《吉林大学》2017年硕士论文

【摘要】：1973年,HP和IBM在合作的项目中研制成功了针对数字系统多个信号之间逻辑关系测试的仪器,随后作为通用仪器被推广开来,逐渐发展为逻辑分析仪,主要用于数字信号的显示、分析、处理。逻辑分析仪的工作原理是采集数字信号,通过内部、外部时钟选择分别进行时序分析和状态分析,同时依靠丰富的触发功能对数据流进行定位、分析时序错误。逻辑分析仪由采集电路、存储器、主控制器、传输模块、显示部分等组成。由于单机版的逻辑分析仪售价昂贵,使用门槛过高,导致难以像示波器一样普及,同时基于PC的虚拟逻辑分析仪发展迅速,成本相对低廉,功能上也能够满足一般的数字信号检测需求。因而本文研究设计了以FPGA为主控制器的虚拟逻辑分析仪,具有采样率高、存储深度大、抗干扰能力强、升级灵活、方便携带、成本低廉等优势,能够满足测试基本数字信号的需求。虚拟逻辑分析系统是以Xilinx公司的XC6SLX45 FPGA现场可编程逻辑控制器为主控芯片,能够实现芯片功能的可重构。它提供了极佳的低功耗和高性能之间的均衡性,通过内存接口管理器连接一颗内存容量为2Gb的SDRAM DDR3,用于对16通道数字信号进行缓存处理,每通道能够保证1MB的存储深度。传输介质采用USB总线,采用了Cypress公司的FX2LP USB微控制器,最终将数据传输到上位机。人机界面由图形化编程语言LabVIEW编写,数字波形通过虚拟化的仪器界面展示,完整实现数字信号的采集、缓存、显示、处理过程。LabVIEW程序开源,可由用户重新构建前面板和逻辑功能。经调试表明,通道之间没有干扰产生,波形能够稳定、准确地触发显示,达到了设计之初的要求。
[Abstract]:In 1973, HP and IBM successfully developed an instrument to test the logic relationship between multiple signals in digital system, which was popularized as a universal instrument and developed into a logic analyzer, which is mainly used to display digital signals.Analysis, treatment.The working principle of the logic analyzer is to collect digital signals, analyze timing and state separately through internal and external clock selection, at the same time, rely on the rich trigger function to locate the data stream and analyze the timing errors.Logic analyzer is composed of acquisition circuit, memory, main controller, transmission module and display part.Because of the high price and high threshold of single machine version logic analyzer, it is difficult to be popularized as oscilloscope. At the same time, the virtual logic analyzer based on PC is developing rapidly and the cost is relatively low.Function can also meet the general needs of digital signal detection.Therefore, a virtual logic analyzer with FPGA as its main controller is designed in this paper, which has the advantages of high sampling rate, large storage depth, strong anti-interference ability, flexible upgrade, easy to carry, low cost, and so on.Able to meet the needs of testing basic digital signals.The virtual logic analysis system takes XC6SLX45 FPGA field programmable logic controller of Xilinx company as the main control chip, and can realize the function reconfiguration of the chip.It provides an excellent balance between low power consumption and high performance. A memory interface manager is used to connect a SDRAM DDR3 with memory capacity of 2Gb to cache 16-channel digital signals. Each channel can guarantee the storage depth of 1MB.The transmission medium adopts USB bus and FX2LP USB microcontroller of Cypress Company. Finally, the data is transferred to the host computer.The man-machine interface is written by the graphical programming language LabVIEW, the digital waveform is displayed through the virtualized instrument interface, the complete realization digital signal collection, the cache, the display, the processing process. LabVIEW program open source,The front panel and logic functions can be rebuilt by the user.The debugging results show that there is no interference between the channels, and the waveform can be triggered and displayed stably and accurately, which meets the requirements of the design at the beginning of the design.
【学位授予单位】：吉林大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TM935

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