无间歇计数器的设计与实现

发布时间：2018-01-17 14:21

本文关键词：无间歇计数器的设计与实现　出处：《电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：目前,由于时间和频率独具的高精度、测量速度快及高度自动化等优点,使得时间和频率的测量在现代测试领域内具有非常重要的作用。在自动化检测技术等精密测量系统中,通常将一些信号参量测量转化成频率测量[1]。在调制域分析仪及高精度时间间隔分析仪等仪器中,ZDT(无间歇)测量技术就是其中核心技术之一,无间歇测频在深入研究时间、频率、相位、周期等参量动态时间特性应用中十分重要。为了适应高精度测量的快速发展,本文研究的ZDT计数器在测试领域具有非常重要的作用。本文以无间歇计数器的设计与实现为研究课题,围绕FPGA为核心,重点研究了频率测量的方法及其误差分析,相位重合检测技术、无间歇测量技术等等。系统方案采用了输入通道+FPGA+总线传输的架构,本文的主要工作如下所述。本文在研究国内外技术文献基础上分析了课题研究的意义和发展,并提出了课题研究的目的和内容,紧接着仔细地分析了测频方法及其误差。在分析完误差后,以课题指标要求为前提,提出了无间歇计数器的设计与实现的总体设计方案,并着重分析了ZDT方案的设计,在此之后,根据设计方案,完成了输入通道具体硬件电路的设计及系统测量逻辑的设计。系统采用了PCI总线、电子开关和数模转换器实现对输入通道的信号的控制如:通道切换、闸门时间的选择、内外触发的选择、幅度放大、触发电平的调节等。此外,利用了相位重合检测技术实现信号的同步,而且以ZDT测量模块为核心实现累加计数、频率测量和时间间隔测量等功能。最后,介绍了调试的方法步骤,总结了调试过程遇到的问题及其解决方案并对测试结果进行分析。经测试表明,基于FPGA无间歇计数器模块能够实现频率、周期、时间间隔的测量。该系统的信号测量结果满足课题提出的指标要求,达到了预期的设计目标。
[Abstract]:At present, because of the high accuracy of time and frequency, high speed of measurement and high automation and so on. The measurement of time and frequency plays a very important role in the field of modern testing. In precision measurement systems such as automatic detection technology, some signal parameters are usually converted into frequency measurement. [1. Among the instruments such as modulation domain analyzer and high-precision time-interval analyzer, the ZDT-based measurement technology is one of the core technologies, and the frequency measurement without intermittent measurement is deeply studied in terms of time, frequency and phase. In order to adapt to the rapid development of high precision measurement, it is very important to apply the dynamic time characteristic of period and other parameters. The ZDT counter studied in this paper plays a very important role in the field of testing. In this paper, the design and implementation of the non-batch counter is the research topic, around FPGA as the core. Focus on the frequency measurement method and error analysis, phase coincidence detection technology, no intermittent measurement technology and so on. The system uses the input channel FPGA bus transmission architecture. The main work of this paper is as follows. Based on the research of domestic and foreign technical literature, this paper analyzes the significance and development of the research, and puts forward the purpose and content of the research. Then, the frequency measurement method and its error are analyzed carefully. After analyzing the error, the design and implementation of the non-batch counter is proposed based on the requirements of the subject index. After analyzing the design of ZDT scheme, the hardware circuit of the input channel and the system measurement logic are designed according to the design scheme. PCI bus is used in the system. Electronic switches and digital-to-analog converters can control input channel signals such as channel switching, gate time selection, internal and external trigger selection, amplitude amplification, trigger level adjustment and so on. The phase coincidence detection technology is used to realize signal synchronization, and the ZDT measurement module is used as the core to realize the functions of cumulative counting, frequency measurement and time interval measurement. Finally, the debugging method and steps are introduced. The problems encountered in the debugging process and their solutions are summarized and the test results are analyzed. The test results show that the non-batch counter module based on FPGA can realize frequency and cycle. Measurement of time interval. The signal measurement results of the system meet the requirements proposed by the project and reach the desired design goal.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM935.462

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