基于相位群同步的高精度频率链接技术研究

发布时间：2018-01-22 05:41

  本文关键词： 原子钟 频率链接 相位群同步 相位群处理　出处：《西安电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：本文提出了周期性现象间相位变化的规律性,提出了相位群同步、相位量子等物理特性,深化了有关最大公因子频率、等效鉴相频率等概念的理论。并把这些新的理论概念应用到原子钟中,与传统处理方法相比简化和改进了原子钟的线路部分,并且将原子频标性能得到提高,产生了基于周期性信号间相位群同步和相位群处理方法的高精度频率链接技术。本文根据周期信号之间的相位关系变化规律,基于相位群同步的理论知识和相位群处理的方法,通过比对两个压控晶体振荡器输出信号的相位差,即时间间隔,经过反馈和数据结果处理后对其中输出频标信号的压控晶体振荡器进行锁相控制,从而达到高精度频率链接的目的。这种频率链接技术简化且改进了传统原子频标结构中的线路部分,使得倍频与频率合成线路、反馈及控制电路实现了简单且集成化,不仅减小了传统频率归一化方法中频率变换电路所带来的相位噪声,而且明显地提高了原子钟输出信号的性能,使原子频标的输出有好的准确度和长期稳定度指标,同时保持了压控晶振本身好的短期稳定度和相位噪声指标,达到了频率高精度链接的技术目的。铯原子钟具有最高的准确度和良好的稳定度,主要用于卫星导航的应用。氢原子钟具有最高的稳定度,目前处于研究和扩展应用的阶段。铷原子钟的优势在于体积小,主要用于商用。经过对比,本论文原子物理部分选用铯原子,经过频率链接技术后输出10MHz的频标信号。本论文所设计的铯原子钟硬件电路主要分为四个部分：信号整形模块,是对线路中两个受控振荡器输出的频率信号经过放大、滤波、施密特触发器后输出脉冲信号；CPLD分频模块,是对10MHz的受控振荡器10000000分频后输出1Hz的信号；时差测量模块,是对分频后的1Hz频率信号和14.591479MHz频率信号进行相位比对,读出它们在每个最小公倍数周期1s内的时间间隔；MCU模块,对时差测量芯片的控制和对10MHz压控振荡器的控制。其中,对受控振荡器进行分频部分是利用Quartus Ⅱ软件用Verilog语言对CPLD在线编程进行测试,实现了计数器分频的功能。利用IAR软件对MSP430F169单片机编程进行调试,实现了对时差测量单元以及受控振荡器的控制,达到了频率链接电路对压控振荡器进行电压控制的目的。通过软、硬件的结合,铯原子钟电路经过改造后,输出的频标信号长期稳定度达到10E-13/天,短期稳定度达到5E-12/s,远端相位噪声达到-162dBc/Hz@1MHz。原子频标有广泛的应用,在计量领域可以作为频率计量和守时、时间同步和时间计量,在工程技术领域可以运用到导航与定位、数字通信等方面。
[Abstract]:In this paper, the regularity of phase variation among periodic phenomena is presented, and the physical properties of phase group synchronization and phase quantum are presented, which deepen the frequency of the most common factor. These new concepts are applied to atomic clock. Compared with the traditional processing method, the circuit part of atomic clock is simplified and improved, and the performance of atomic frequency standard is improved. A high-precision frequency link technique based on phase group synchronization and phase group processing between periodic signals is presented in this paper according to the variation of phase relationship between periodic signals. Based on the theoretical knowledge of phase group synchronization and the method of phase group processing, the phase difference of the output signals of two VCO is compared, that is, the time interval. After feedback and data processing, the voltage-controlled crystal oscillator which outputs the frequency standard signal is controlled by phase-locking. In order to achieve the goal of high precision frequency link, this frequency link technology simplifies and improves the circuit part of the traditional atomic frequency standard structure, which makes the frequency doubling and frequency synthesizing circuit. The feedback and control circuit is simple and integrated, which not only reduces the phase noise caused by the frequency conversion circuit in the traditional frequency normalization method, but also improves the performance of the atomic clock output signal. The atomic frequency standard output has good accuracy and long-term stability index, while maintaining the voltage control crystal oscillator itself good short-term stability and phase noise index. Cesium atomic clock has the highest accuracy and good stability, which is mainly used in satellite navigation. Hydrogen atomic clock has the highest stability. The advantage of rubidium atomic clock is that it is small in size and mainly used for commercial use. By comparison, cesium atom is selected in the atomic physics part of this paper. The frequency standard signal of 10MHz is output after frequency link technology. The hardware circuit of cesium atomic clock designed in this paper is mainly divided into four parts: signal shaping module. The output frequency signal of the two controlled oscillators in the circuit is amplified, filtered and output pulse signal after Schmitt flip-flop. The CPLD frequency division module is used to output 1 Hz signal after 10000000 frequency division of the controlled oscillator of 10 MHz. The time difference measurement module is used to compare the frequency signals of 1Hz and 14.591479MHz, and read out their time intervals within 1s of each minimum common multiple period. The MCU module controls the time difference measurement chip and the 10MHz voltage-controlled oscillator. In the part of frequency division of controlled oscillator, CPLD on-line programming is tested by Quartus 鈪，

本文编号：1453848