一种无片外电容LDO线性稳压器设计

发布时间：2018-03-17 17:43

本文选题：低压差　切入点：共源共栅　出处：《电子科技大学》2014年硕士论文　论文类型：学位论文

【摘要】：随着便携式电子产品的迅速发展,直流稳压芯片也越来越重要,低压差(Low Dropout,LDO)线性稳压器由于具有输出稳定、电压纹波小等优点,得到了广泛的应用。而传统的LDO线性稳压器通常需要较大的片外电容,这会增加应用成本,本文针对传统LDO线性稳压器的缺点,设计了一种无片外电容的LDO线性稳压器。首先设计一款折叠式共源共栅结构的运算放大器,基于所设计的运放,设计了三种基准电压源结构,分别为传统带隙基准电压源,二阶补偿带隙基准电压源和全MOS基准电压源。然后对这三种基准电压源进行仿真和比较,仿真结果表明,在三种基准电压源中,MOS结构基准电压源的性能是最好的,温度系数为0.68ppm/°C,线性调整率为17.5μV/V,功耗为0.4 mW。基于所设计的MOS结构的基准电压源,本文设计了一种无片外电容LDO电路,采用密勒补偿电容对环路进行补偿,然后对其进行仿真。仿真结果表明:LDO线性稳压器工作电压可在-9~-15 V之间变化,输出电压为-8 V,最大输出电流为200 mA,线性调整率为941μV/V,负载调整率为0.42 V/A,温度系数为78.12ppm/°C,电源抑制比为-54.36 dB,LDO电路的功耗为2.9 mW,瞬态过冲电压为230 mV。所设计的LDO线性稳压器基本达到预先设定的指标。最后对整个电路进行版图设计,送交代工厂流片。
[Abstract]:With the rapid development of portable electronic products, DC voltage stabilizer is becoming more and more important. The low voltage differential low drop out LDO (LDO) linear regulator has the advantages of stable output, small voltage ripple, and so on. The traditional LDO linear regulator usually needs larger out of chip capacitance, which will increase the application cost. This paper aims at the disadvantages of the traditional LDO linear regulator. A kind of LDO linear voltage regulator without off-chip capacitance is designed. Firstly, an operational amplifier with foldable common-grid structure is designed. Based on the operational amplifier, three kinds of reference voltage source structures are designed, one is the traditional bandgap voltage reference source, the other is the traditional bandgap voltage reference source. The second order compensated bandgap voltage reference source and the full MOS reference voltage source are simulated and compared. The simulation results show that the performance of the MOS structure reference voltage source is the best among the three reference voltage sources. The temperature coefficient is 0.68 ppm / 掳C, the linear adjustment rate is 17.5 渭 V / V, and the power consumption is 0.4 MW. Based on the designed reference voltage source of MOS structure, this paper designs a non-chip capacitor LDO circuit, which uses Miller compensation capacitor to compensate the loop. The simulation results show that the working voltage of the 10: LDO linear regulator can vary from -9 to 15 V. The output voltage is -8 V, the maximum output current is 200 Ma, the linear adjustment rate is 941 渭 V / V / V, the load adjustment rate is 0.42 V / A, the temperature coefficient is 78.12 ppm / 掳C, the power dissipation of the PSRR is -54.36 dBU LDO circuit is 2.9 MW, and the transient overshoot voltage is 230 MV. The preset is basically up to the preset target. Finally, the layout of the whole circuit is designed. Delivery to the manufacturer.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM44

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