低谐波PWM驱动器功率拓扑结构设计与验证

发布时间：2018-06-16 15:26

本文选题：低谐波 + PWM功率驱动　；参考：《电子科技大学》2014年硕士论文

【摘要】：高性能电机是高精度运动工作台实现精密运动的核心部件,而其电机驱动器在电机性能的实现中占据重要地位。对于电机驱动器而言,相对于外环速度与位置控制,首先值得关注的是其驱动电流性能,包括电流噪声与精度、电流的快速响应能力、最大电流以及输出电流与指令电流之间的线性度等。其中电流噪声与精度、电流响应速度等性能取决于驱动器的功率驱动单元的工作电压、驱动类型和驱动拓扑。论文针对具有高压、大电流能力的PWM驱动器类型的驱动拓扑开展研究,主要研究了PWM驱动器的功率拓扑结构设计、PWM算法,抑制输出电流谐波,提高等效开关频率,提高驱动器在频率带宽和电流噪声等方面的性能。论文主要工作内容如下:1.分析了本课题的背景以及深刻的研究意义,介绍了当前的PWM驱动器研究现状以及相关技术发展。2.讨论了PWM型驱动器基本逆变电路,利用傅里叶级数展开分析了逆变电路的谐波产生的原因以及死区对谐波的影响,然后就如何减少谐波总量、提高等效开关频率具体分析了交错并联拓扑结构以及相移载波PWM算法。3.提出了一种电流驱动PWM功率拓扑设计方案,利用MATLAB对该设计进行分析,改进了现有的载波相移PWM算法,进一步减少输出谐波总量,提高等效开关频率。在此基础上,引入了LRC滤波电路,针对谐波中的主要分量频率,设计低通滤波器参数,抑制驱动器输出谐波。4.基于所提功率拓扑结构,对PWM驱动器进行了详细设计,包括DSP、FPGA和IPM等核心器件硬件,详述了各部分电路原理设计,概要介绍了驱动器的DSP程序、FPGA程序以及上位机调试软件的设计。5.以PWM驱动器为核心构建了伺服运动平台,基于该平台进行了电流开环实验,实验结果分析验证了理论分析与电路设计的正确性。
[Abstract]:High performance motor is the core component of high precision motion worktable to realize precision motion, and its motor driver plays an important role in the realization of motor performance. For motor drivers, relative to outer ring speed and position control, it is the first to pay attention to its driving current performance, including current noise and precision, rapid current. The response capability, the maximum current and the linearity between the output current and the instruction current. The performance of the current noise and precision, the current response speed and so on depends on the working voltage, driving type and driving topology of the power drive unit of the drive. This paper is based on the driving topology of the PWM driver type with high voltage and high current capacity. It mainly studies the power topology structure design of PWM driver, PWM algorithm, restraining the output current harmonics, improving the equivalent switching frequency, improving the performance of the driver in frequency bandwidth and current noise. The main contents of this paper are as follows: 1. the background of this topic and the profound research significance are analyzed, and the current PWM is introduced. The current status of drive research and the development of related technology.2. discussed the basic inverter circuit of PWM type driver, analyzed the cause of the harmonic generation of the inverter circuit by Fu Liye series expansion and the influence of dead zone on the harmonic. Then it analyzed the staggered parallel topology structure and analyzed the interlaced parallel topology structure on how to reduce the total harmonic total and improve the equivalent switching frequency. The phase shift carrier PWM algorithm.3. proposed a current driven PWM power topology design scheme. Using MATLAB to analyze the design, the existing carrier phase shift PWM algorithm was improved, and the total output harmonic total and the equivalent switching frequency were further reduced. Based on this, the LRC filter circuit was introduced to design the main component frequency in the harmonic. The parameters of the low pass filter and the suppression of the drive output harmonic.4. are based on the topology of the proposed power. The PWM driver is designed in detail, including the hardware of the core devices such as DSP, FPGA and IPM. The circuit principle of each part is detailed. The DSP program of the driver, the FPGA program and the design.5. of the debug software of the host computer are introduced to the PWM driver. The servo platform is built at the core, and the current opening experiment is carried out based on the platform. The results of the experiment verify the correctness of the theoretical analysis and the circuit design.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM303

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