一款宽输入非同步恒流降压型DC-DC芯片的设计
发布时间：2018-08-08 16:35
【摘要】：随着微电子技术的快速进步,电源管理芯片正朝着高性能、高效率、低功耗的方向高速发展,对各种类型电源设计以及应用多样化的研究也越来越活跃,以更好地满足各种电子设备对电源性能的要求。相对于线性电源,开关电源由于其具有更高的效率以及可向负载提供大电流的特点而得到广泛应用。本论文详细介绍了Buck型DC-DC开关电源转换器的基本工作原理、调制模式以及环路控制方式,并在此基础上设计了一款具有恒流功能的宽输入非同步降压型DC-DC转换器芯片。芯片输入范围为10-40V,内部具有电压预调制电路,可以把比较高的输入电压转化为芯片内部5V左右的低电压,给基准电路模块提供内部电源,以降低芯片静态功耗。内部集成高压功率开关管,最大输出电流可达3A,具有过温保护电路,保证芯片能够在恶劣的环境下可靠地工作。采用非同步整流技术,外接续流二极管,逻辑驱动电路简单,不需要零电流检测电路,简化了系统电路设计的复杂度,减小了芯片版图面积,在保证较高效率的情况下,节约了系统成本。本论文提出了一种新颖的恒流控制设计方法,在保证恒流精度的情况下,无需外部精确的电流采样电阻,减少芯片外围器件以及芯片引脚,节约了系统成本,提高了芯片的电源转化效率。可选择工作在输出恒流状态或者恒压状态,实现负载恒流驱动或者恒压驱动。采用峰值电流模脉宽调制方式,实现逐周期的电流限制,提高了芯片对输入电压以及负载变化的瞬态响应能力。采用自适应斜坡补偿技术对电流环路进行稳定,在占空比较小时不对采样电压进行补偿,以提高芯片的带载能力以及瞬态响应能力,在占空比较大时在采样电压上叠加一个斜坡电压,消除电流环固有的不稳定,避免亚斜波震荡现象。芯片可工作在CCM或DCM模式,当负载电流较大时,工作在CCM模式,当负载电流很小时,可工作在Burst模式。在此模式下,当芯片进入休眠模式时,关断芯片大部分模块,仅保留基本的模块,包含基准电路,振荡器等,以减小静态功耗,提高芯片轻载时的效率。芯片还集成了短路保护,输出过压保护,电流限制保护等功能,保证芯片在异常工作情况下实现自我保护。基于0.35μm 40V BCD工艺,在Cadence软件平台下进行了芯片子模块以及系统整体功能的设计以及仿真验证。仿真结果显示,芯片很好地实现了恒流恒压功能,恒流精度达到±5%,恒压精度达到±2%,最高效率可达94%,并最终完成了芯片的版图设计,现正在流片。
[Abstract]:With the rapid development of microelectronics technology, power management chips are developing rapidly towards high performance, high efficiency and low power consumption. The research on various types of power supply design and application is becoming more and more active. To better meet the requirements of various electronic equipment on power performance. Compared with linear power supply, switching power supply is widely used because of its high efficiency and high current supply to load. In this paper, the basic principle, modulation mode and loop control mode of Buck type DC-DC switching power converter are introduced in detail. Based on this, a wide input asynchronous step-down DC-DC converter chip with constant current function is designed. The input range of the chip is 10-40V, and the internal voltage premodulation circuit can convert the higher input voltage to the low voltage of about 5V inside the chip, and provide the internal power supply to the reference circuit module in order to reduce the static power consumption of the chip. The internal high voltage power switch is integrated, the maximum output current is up to 3A, and the over-temperature protection circuit is provided to ensure that the chip can work reliably in the harsh environment. Using asynchronous rectifier technology, external continuous diode, simple logic drive circuit, no need of zero current detection circuit, simplifies the complexity of the system circuit design, reduces the layout area of the chip, and ensures high efficiency. The system cost is saved. In this paper, a novel design method of constant current control is proposed. Without external accurate current sampling resistance, the chip peripheral devices and chip pins are reduced, and the system cost is saved. The power conversion efficiency of the chip is improved. Can work in the output constant current state or constant voltage state, realize the load constant current drive or constant voltage drive. The peak current-mode pulse width modulation is used to limit the current cycle by cycle, which improves the transient response of the chip to the input voltage and load variation. The adaptive ramp compensation technique is used to stabilize the current loop, and the sampling voltage is not compensated in the duty cycle, so as to improve the capacity of the chip with load and transient response. When the duty cycle is large, a slope voltage is superimposed on the sampling voltage to eliminate the inherent instability of the current loop and to avoid the phenomenon of sub-oblique wave oscillation. The chip can work in CCM or DCM mode. When the load current is large, it can work in CCM mode. When the load current is small, it can work in Burst mode. In this mode, when the chip is in dormant mode, most of the modules of the chip are turned off, only the basic modules, including the reference circuit, the oscillator, etc., are retained to reduce the static power consumption and improve the efficiency of the chip under light load. The chip also integrates the functions of short circuit protection, output overvoltage protection and current limiting protection to ensure the self-protection of the chip under abnormal working conditions. Based on 0.35 渭 m 40V BCD process, the design and simulation of the chip submodule and the whole function of the system are carried out under the Cadence software platform. The simulation results show that the chip realizes the constant current and constant voltage function very well, the constant current accuracy reaches 卤5, the constant voltage accuracy reaches 卤2 and the maximum efficiency reaches 94. Finally, the layout design of the chip is completed, and the chip is now flowing.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM46
本文编号：2172376
[Abstract]:With the rapid development of microelectronics technology, power management chips are developing rapidly towards high performance, high efficiency and low power consumption. The research on various types of power supply design and application is becoming more and more active. To better meet the requirements of various electronic equipment on power performance. Compared with linear power supply, switching power supply is widely used because of its high efficiency and high current supply to load. In this paper, the basic principle, modulation mode and loop control mode of Buck type DC-DC switching power converter are introduced in detail. Based on this, a wide input asynchronous step-down DC-DC converter chip with constant current function is designed. The input range of the chip is 10-40V, and the internal voltage premodulation circuit can convert the higher input voltage to the low voltage of about 5V inside the chip, and provide the internal power supply to the reference circuit module in order to reduce the static power consumption of the chip. The internal high voltage power switch is integrated, the maximum output current is up to 3A, and the over-temperature protection circuit is provided to ensure that the chip can work reliably in the harsh environment. Using asynchronous rectifier technology, external continuous diode, simple logic drive circuit, no need of zero current detection circuit, simplifies the complexity of the system circuit design, reduces the layout area of the chip, and ensures high efficiency. The system cost is saved. In this paper, a novel design method of constant current control is proposed. Without external accurate current sampling resistance, the chip peripheral devices and chip pins are reduced, and the system cost is saved. The power conversion efficiency of the chip is improved. Can work in the output constant current state or constant voltage state, realize the load constant current drive or constant voltage drive. The peak current-mode pulse width modulation is used to limit the current cycle by cycle, which improves the transient response of the chip to the input voltage and load variation. The adaptive ramp compensation technique is used to stabilize the current loop, and the sampling voltage is not compensated in the duty cycle, so as to improve the capacity of the chip with load and transient response. When the duty cycle is large, a slope voltage is superimposed on the sampling voltage to eliminate the inherent instability of the current loop and to avoid the phenomenon of sub-oblique wave oscillation. The chip can work in CCM or DCM mode. When the load current is large, it can work in CCM mode. When the load current is small, it can work in Burst mode. In this mode, when the chip is in dormant mode, most of the modules of the chip are turned off, only the basic modules, including the reference circuit, the oscillator, etc., are retained to reduce the static power consumption and improve the efficiency of the chip under light load. The chip also integrates the functions of short circuit protection, output overvoltage protection and current limiting protection to ensure the self-protection of the chip under abnormal working conditions. Based on 0.35 渭 m 40V BCD process, the design and simulation of the chip submodule and the whole function of the system are carried out under the Cadence software platform. The simulation results show that the chip realizes the constant current and constant voltage function very well, the constant current accuracy reaches 卤5, the constant voltage accuracy reaches 卤2 and the maximum efficiency reaches 94. Finally, the layout design of the chip is completed, and the chip is now flowing.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM46
【参考文献】
相关硕士学位论文 前1条
1 李严彦;电流型DC-DC变换器研究设计[D];西安电子科技大学;2010年
，本文编号：2172376
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