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HIT太阳电池工艺技术研究

发布时间:2018-10-09 12:31
【摘要】:在晶硅电池的研究领域当中,创新结构的HIT(Hetero-junction with intrinsic thin film)太阳电池具有结构简单、制作工艺简单、高效率、高稳定性、低成本等特点。因此,HIT太阳电池吸引着越来越多研究者的兴趣。 本文着重研究了HIT太阳电池本征非晶硅层和P型非晶硅层的制备工艺,以及单晶硅衬底的织构和圆滑工艺,同时简单研究了本征非晶硅厚度和氢处理时间对太阳电池性能的影响。对各项工艺参数进行了优化,,为后续获得高效率的HIT太阳电池提供了参考。 采用等离子增强化学气相淀积(PECVD)制备HIT太阳电池的本征非晶硅层和P型非晶硅层。通过研究不同沉积参数对薄膜生长速率、光学带隙、暗电导以及太阳电池开路电压的影响,对非晶硅层的制备工艺进行了优化。本征非晶硅层的沉积参数优化为衬底温度350℃,硅烷浓度20%,射频功率4W,本征非晶硅薄膜厚度为3.3nm。P型非晶硅层的沉积参数优化为衬底温度350℃,硼烷/硅烷比1%,射频功率8W。对沉积非晶硅层前的单晶硅衬底进行氢处理,氢处理能够有效钝化单晶硅衬底表面,为后续工艺提供良好环境。氢处理的时间优化为40s。优化后的工艺制备的太阳电池效率达到15.56%。 采用碱性腐蚀液对单晶硅衬底进行表面织构。通过研究腐蚀温度、异丙醇(IPA)浓度、氢氧化钠(NaOH)浓度、腐蚀时间对单晶硅衬底表面反射率的影响,对单晶硅衬底织构的工艺参数进行了优化。单晶硅衬底织构的优化参数为80℃,3vol%IPA,1.1wt%NaOH,22.5min,0.3vol%添加剂。织构后的单晶硅衬底反射率为11.68%,在表面形成分布、大小均匀的金字塔状结构,金字塔结构基底宽度为2-4μm。 对织构后的单晶硅衬底采用酸性溶液进行圆滑处理。研究不同腐蚀时间对单晶硅衬底表面反射率和表面形貌的影响。圆滑工艺的腐蚀时间优化为60s。优化后的制绒和圆滑工艺对太阳电池的各方面性能都有所提升。
[Abstract]:In the research field of crystalline silicon battery, the innovative HIT (Hetero-junction with intrinsic thin film) solar cell) has the characteristics of simple structure, simple fabrication process, high efficiency, high stability and low cost. Therefore, HIT solar cells are attracting more and more researchers' interest. In this paper, the preparation process of intrinsic amorphous silicon layer and P-type amorphous silicon layer of HIT solar cell, as well as the texture and smooth process of monocrystalline silicon substrate are studied. The effects of intrinsic amorphous silicon thickness and hydrogen treatment time on the performance of solar cells were also studied. The process parameters are optimized to provide a reference for obtaining high efficiency HIT solar cells. The intrinsic amorphous silicon layer and P type amorphous silicon layer of HIT solar cell were prepared by plasma enhanced chemical vapor deposition (PECVD). By studying the effects of different deposition parameters on the growth rate, optical band gap, dark conductance and open circuit voltage of solar cells, the preparation process of amorphous silicon layer was optimized. The deposition parameters of the intrinsic amorphous silicon layer are optimized as follows: substrate temperature 350 鈩

本文编号:2259345

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