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单级PFC反激式LED驱动电路效率的分析与研究

发布时间:2018-10-16 17:56
【摘要】:在中小功率的LED驱动领域,单级PFC反激式变换器因结构简单,成本低廉而得到了广泛的应用。然而,由于这种结构通常采用固定开通时间的方式来实现PFC功能,频率变化范围较大,特别是在轻载时频率很高,效率低下。同时,反激式拓扑使用的变压器原边和副边线圈的漏感都较大,变压器损耗严重。因此研究单级PFC反激式LED驱动的效率问题显得尤为重要。本文设计了一款基于准谐振技术的单级PFC反激式LED驱动芯片,并且同时设计了此类LED驱动常用的临界控制模式结构以便于两者的对比。芯片外围采用了原边反馈方式,内部主要包括谷底检测模块、次级电感电流过零检测模块、输出电流预处理模块、误差放大器模块、栅驱动模块以及欠压过压等各种保护模块。为降低芯片本身的功耗,在保证可靠性的前提下,设计的子模块大部分都采用了低功耗设计,如减小误差放大器的静态功耗、合理设计过零检测电路的放电电量、减小栅驱动电路的动态损耗等。由于要同时实现恒流、PFC以及准谐振功能,而它们相互关联,因此电路在各个性能之间需要进行折衷处理。本文分析了开关电源中损耗的主要来源,以及现今一些常用的提高效率的方法,并对比了单级PFC与两级PFC的优缺点。根据设计目标要求,完成了整体电路的结构设计及效率的理论分析,设计并仿真了部分子模块。基于TSMC_0.5μm BCD工艺对芯片进行了整体仿真,在输入电压85~265VAC范围内,输出负载为12×1W情况时,准谐振模式下LED驱动的平均效率为93.04%,临界模式下LED驱动的平均效率为87.95%,由此可见,采用准谐振技术可以有效提高单级PFC反激式LED驱动的效率。论文还对基于准谐振技术的LED驱动在不同负载时的效率和PF进行了仿真,得到了在设计的全电压和全负载范围内,LED驱动的平均效率为92.5%,PF均超过0.9,从而验证了准谐振技术在单级PFC LED驱动电路中的实用性。
[Abstract]:In the field of medium and small power LED drive, single stage PFC flyback converter is widely used because of its simple structure and low cost. However, because this kind of structure usually uses the fixed opening time to realize the PFC function, the frequency variation range is large, especially in the light load, the frequency is very high and the efficiency is low. At the same time, the leakage inductance of the primary and secondary coils of the flyback topology is larger, and the transformer loss is serious. Therefore, it is very important to study the efficiency of single stage PFC flyback LED driver. In this paper, a single-stage PFC flyback LED driver chip based on quasi-resonant technique is designed, and the critical control mode structure of this kind of LED driver is also designed to facilitate the comparison between the two. The peripheral of the chip adopts the original side feedback mode, which mainly includes the bottom detection module, the secondary inductor current zero crossing detection module, the output current preprocessing module, the error amplifier module, the gate drive module and various protection modules such as undervoltage and overvoltage. In order to reduce the power consumption of the chip itself, most of the sub-modules are designed with low power consumption, such as reducing the static power consumption of the error amplifier and reasonably designing the discharge quantity of the zero-crossing detection circuit. Reduce the dynamic loss of gate drive circuit, etc. Since the constant-current, PFC and quasi-resonant functions are to be implemented simultaneously, and they are interrelated, the circuit needs to be compromised among each performance. In this paper, the main source of loss in switching power supply and some common methods to improve efficiency are analyzed, and the advantages and disadvantages of single stage PFC and two stage PFC are compared. According to the requirements of the design goal, the structure design and efficiency analysis of the whole circuit are completed, and some sub-modules are designed and simulated. The chip is simulated based on TSMC_0.5 渭 m BCD process. When the output load is 12 脳 1W, the average efficiency of LED driver is 93.04 in quasi-resonant mode and 87.95g in critical mode, which shows that, in the range of input voltage 85~265VAC and output load of 12 脳 1W, the average efficiency of LED driver is 93.04 and 87.95g respectively. Using quasi-resonance technique can effectively improve the efficiency of single-stage PFC flyback LED drive. The paper also simulates the efficiency and PF of the LED driver based on quasi-resonance technology under different loads. It is obtained that the average efficiency of LED driver is over 0.9in the range of full voltage and full load, which verifies the practicability of quasi-resonant technique in single-stage PFC LED drive circuit.
【学位授予单位】:电子科技大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TM923.34

【共引文献】

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