基于单级Buck型PFC转换器的环路稳定性分析与设计
发布时间：2018-11-28 07:07
【摘要】：随着电子系统的不断进步,电子电器设备在日常生活中占据着越来越重要的地位,同时对电网造成的谐波污染也日益增加,而功率因数校正(PFC)技术是提高电子设备的功率因数、减少谐波失真、降低电网污染、提高电能利用率的有效方法,因此,电源芯片的PFC技术成了当前电子领域关注和研究的焦点之一。其中,有源功率因数校正(APFC)技术不仅能够提高功率因数和降低总谐波失真(THD),同时因为其输入电压范围大、结构简单、效率高等优点而其被广泛应用。为了适应低功率的电子设备应用,本论文重点研究低成本高功率因数的PFC电源芯片的设计方法。本论文设计了一款单级Buck型功率因数校正(PFC)电源管理类芯片XD5814A,并分析其环路稳定性。首先论文阐述了降压型PFC电源芯片的研究背景及其技术的重要性;其次介绍了功率因数校正技术的基本定义、控制方法,并给出了电源芯片XD5814A的电气特性指标和系统功能;再次,用状态空间平均法给Buck型拓扑结构建模和分析其稳定性,并通过分析传输函数的零极点来提高系统环路的稳定性;最后,进行电源芯片XD5814A的关键子模块和整体电路的仿真并验证。针对以往功率因数校正电源芯片采用低带宽滤波功能减低谐波失真而导致电源芯片环路系统的瞬态响应慢的缺陷,本电源芯片的跨导运算放大器采用增强压摆率的新颖结构;同时本电源芯片采用准谐振模式的控制方式提高工作效率和采用固定导通时间控制实现交流输入电流波形跟随交流输入电压波形,从而达到高的功率因数。此外,为了提高电流控制精度,实现功率因数校正,本电源芯片的电感电流采样电路获得精确的输出电流信息从而实现输出恒流的控制;为了提高提高电源芯片的安全可靠性,在其内部集成欠压锁存电路、开路保护电路和过温保护电路等保护系统;同时为了缩短电源芯片的研发周期,在其内部集成了可测性电路。本论文设计的Buck型PFC电源芯片有效地减小电流畸变,很好地实现输入电流跟随输入电压的相位,大大降低了THD,在0.35μm,5V/40V/600V BCD工艺模型下,用Hspice工具进行仿真与验证,这款PFC电源芯片在输出电压为24V,输出电流为0.3A(0.1Aout?I?)的情况下,功率因数(PF)等于0.977,总谐波失真(THD)等于0.21,由仿真结果可知性能良好。
[Abstract]:With the continuous progress of electronic system, electronic and electrical equipment occupies a more and more important position in daily life, at the same time, the harmonic pollution caused by power grid is also increasing day by day. Power factor correction (PFC) is an effective method to improve power factor of electronic equipment, reduce harmonic distortion, reduce power grid pollution and improve power utilization ratio. The PFC technology of power chip has become one of the focus in the field of electronics. Among them, active Power Factor Correction (APFC) technology can not only improve the power factor and reduce the total harmonic distortion (THD), but also be widely used because of its large input voltage range, simple structure, high efficiency and so on. In order to adapt to the application of low power electronic equipment, this paper focuses on the design method of low cost and high power factor PFC power chip. In this paper, a single stage Buck power factor correction (PFC) (PFC) power management chip (XD5814A,) is designed and its loop stability is analyzed. Firstly, the research background and the importance of the technology of PFC power supply chip are introduced, then the basic definition and control method of power factor correction technology are introduced, and the electrical characteristic index and system function of the power supply chip XD5814A are given. Thirdly, the state space averaging method is used to model and analyze the stability of Buck topology, and the stability of the loop is improved by analyzing the zero pole of the transmission function. Finally, the key sub-modules and the whole circuit of the power chip XD5814A are simulated and verified. In order to reduce the harmonic distortion of the power factor correction power supply chip with low bandwidth filter, the transient response of the loop system of the power supply chip is slow. The transconductance operational amplifier of the power factor correction chip adopts a novel structure of enhanced swinging rate. At the same time, the control mode of quasi-resonant mode is adopted to improve the working efficiency and the fixed on-time control is used to realize the AC input current waveform following the AC input voltage waveform, thus achieving a high power factor. In addition, in order to improve the accuracy of current control and realize power factor correction, the inductance current sampling circuit of the power supply chip obtains accurate output current information to realize the control of output constant current. In order to improve the safety and reliability of the power supply chip, the under-voltage latch circuit, open-circuit protection circuit and over-temperature protection circuit are integrated into the power chip. In order to shorten the research and development cycle of the power chip, the testability circuit is integrated inside the chip. The Buck type PFC power supply chip designed in this paper can effectively reduce the current distortion, realize the phase of input current following the input voltage, and greatly reduce the THD, process model under 0.35 渭 m / 5 V / 40 V / 600V BCD process model. The PFC power supply chip is simulated and verified by Hspice tool. The output voltage is 24V and the output current is 0.3A (0.1Aouti?) When the power factor (PF) is 0.977 and the total harmonic distortion (THD) is 0.21, the simulation results show that the performance is good.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM46
本文编号：2362160
[Abstract]:With the continuous progress of electronic system, electronic and electrical equipment occupies a more and more important position in daily life, at the same time, the harmonic pollution caused by power grid is also increasing day by day. Power factor correction (PFC) is an effective method to improve power factor of electronic equipment, reduce harmonic distortion, reduce power grid pollution and improve power utilization ratio. The PFC technology of power chip has become one of the focus in the field of electronics. Among them, active Power Factor Correction (APFC) technology can not only improve the power factor and reduce the total harmonic distortion (THD), but also be widely used because of its large input voltage range, simple structure, high efficiency and so on. In order to adapt to the application of low power electronic equipment, this paper focuses on the design method of low cost and high power factor PFC power chip. In this paper, a single stage Buck power factor correction (PFC) (PFC) power management chip (XD5814A,) is designed and its loop stability is analyzed. Firstly, the research background and the importance of the technology of PFC power supply chip are introduced, then the basic definition and control method of power factor correction technology are introduced, and the electrical characteristic index and system function of the power supply chip XD5814A are given. Thirdly, the state space averaging method is used to model and analyze the stability of Buck topology, and the stability of the loop is improved by analyzing the zero pole of the transmission function. Finally, the key sub-modules and the whole circuit of the power chip XD5814A are simulated and verified. In order to reduce the harmonic distortion of the power factor correction power supply chip with low bandwidth filter, the transient response of the loop system of the power supply chip is slow. The transconductance operational amplifier of the power factor correction chip adopts a novel structure of enhanced swinging rate. At the same time, the control mode of quasi-resonant mode is adopted to improve the working efficiency and the fixed on-time control is used to realize the AC input current waveform following the AC input voltage waveform, thus achieving a high power factor. In addition, in order to improve the accuracy of current control and realize power factor correction, the inductance current sampling circuit of the power supply chip obtains accurate output current information to realize the control of output constant current. In order to improve the safety and reliability of the power supply chip, the under-voltage latch circuit, open-circuit protection circuit and over-temperature protection circuit are integrated into the power chip. In order to shorten the research and development cycle of the power chip, the testability circuit is integrated inside the chip. The Buck type PFC power supply chip designed in this paper can effectively reduce the current distortion, realize the phase of input current following the input voltage, and greatly reduce the THD, process model under 0.35 渭 m / 5 V / 40 V / 600V BCD process model. The PFC power supply chip is simulated and verified by Hspice tool. The output voltage is 24V and the output current is 0.3A (0.1Aouti?) When the power factor (PF) is 0.977 and the total harmonic distortion (THD) is 0.21, the simulation results show that the performance is good.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TM46
【参考文献】
相关期刊论文 前1条
1 胡庆波;瞿博;吕征宇;;一种新颖的应用于PFC电路中电流控制的方法[J];中国电机工程学报;2006年03期
，本文编号：2362160
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